Assistant Project Engineering Design C++ Java

VISWANATH KRISHNAMURTHY

***, ***** ****** ***. #***, Ames, IA 50014

515-***-**** *****@*******.***

OBJECTIVE

To obtain a challenging FULL-TIME computer engineering position to harness and enhance my skills in

the areas of Software Engineering and Computer Architecture.

EDUCATION

M.S. Computer Science Iowa State University, Ames, IA. GPA: 3.36/4.0 Expected: July-2009

B.E Computer Science Anna University, India. G.PA - 3.5/4.0 July 2006

RELEVANT COURSEWORK

Design and Analysis of Algorithms, Computer Architecture, Operating Systems, Object Oriented

Programming, Software Engineering, Network Security, Statistics, Theory of Computations,

Microprocessor Design.

TECHNICAL SKILLS

Programming Languages: C, C++, C#, Java, VB 6.0, MPI, Shell Scripting, .Net, Oracle 8.0, SQL.

Scripting Languages: Perl, UNIX Shell Scripting

Operating Systems: LINUX, Windows.

Web Technologies: HTML, Java Script, DHTML, XML, PHP.

Hardware Description Languages: VHDL, Verilog

Other tools: SPIN Model Checker, GNU-Make, M5 simulator

RESEARCH EXPERIENCE

Research Assistant Aug 2008 - Present

Iowa State University, Ames, Iowa

Project Title: Polymorphic Thread Scheduling in Multi-Core processors

Technologies: C, C++, Linux Kernel development

Responsibilities:

Working on Implementation of thread scheduler in embedded systems modifying Linux kernel.

Designed an approach for maximizing user satisfaction function in a multi-threaded environment

Research Assistant Jul 2008 - Present

Center for Non-Destructive Evaluation (CNDE), Iowa State University, Ames, Iowa

Project Title: 3-D Image Analysis and Processing of Computed Tomography (CT) Data

Technologies: .Net, Visual C++

Responsibilities:

Fixed bugs and implemented routines in C++ for hotpixel correction.

Enhanced performance of Image Analysis algorithms by decreasing run time by 50%.

Upgrading Phosphor screen Computed Tomography system to use Apogee Camera.

Research Assistant Jan 2007- Jul 2008

Iowa State University, Ames, Iowa

Project Title: Application Scheduling in Multi-Core Processors

Technologies: C, C++, M5 Simulator

Responsibilities:

Proposed efficient thread-core assignment strategy for mapping application threads in multi-cores.

Developed an algorithm employing record and replay feature for application mapping in multi-

cores.

Undergraduate Part-Time Research Trainee May 2004- Jul 2006

WAran Research Foundation (WARFT), Chennai, India

Technologies: C, C++, Linux

Responsibilities:

Collaborated with members of High Performance Computing (HPC) group in the design of novel

supercomputer architecture.

Organized and presented the session, “Beyond Exa-Flops Computing”, at workshop on Brain

Modeling and Supercomputing held in India.

Designed and implemented the Library Design Simulator for a novel supercomputer architecture

using C and C++.

UNDERGRADUATE THESIS PROJECT Jan 2006 – Jun 2006

“Porting High-end Applications on MIP SCOC (Memory –In – Processor Supercomputer on Chip)”

Devised an efficient porting strategy to convert High Level language codes into MIP SCOC

libraries.

Programmed extensively in C and C++ to implement matrix, graph and vector algorithms.

RESEARCH PAPERS

Prof. Hridesh Rajan Viswanath.K, et al. “Predictive Thread-to Core Assignment on a

Heterogeneous Multi-Core Processor” - proceedings of PLOS ’07: Workshop on Programming

Languages and Operating Systems, Washington, USA, October 2007

Prof. N.Venkateswaran, Viswanath.K et al. “Future Generation Supercomputers II: A Paradigm

for Cluster Architecture” published in the Journal ACM SIGARCH Computer Architecture

News, Vol. 35, No. 5, December 2007.

Prof. N.Venkateswaran, Viswanath.K et al. “High Performance Low Power Single Chip

Reconfigurable Supercomputer for High-end Aerospace Applications” - presentation at the 8th

International MAPLD 05 Conference conducted by NASA on Sep 7, 2005.

Prof. N.Venkateswaran, Viswanath K et al. “Simulation Model for predicting The Multi-Million

Neuron Interconnectivity and Evolution of a Neurophysiologically Inspired Supercomputing

Architecture for Modeling the Respective Brain Regions” presented at Max Planck Institute of

Medical Research Workshop, “Data driven Modeling and Computational Neuroscience” DMCN

2005, Heidelberg, Germany, conducted by Prof Bert Sakmann, Nobel Laureate 1991, Springer

Verlag.

Prof N. Venkateswaran, Viswanath K et al “On the Concepts of Simultaneous Execution of

Multiple Applications on the Hierarchically-Based Cluster and the Silicon Operating System” -

presented at workshop on Large-Scale Parallel Processing, IEEE International Parallel and

Distributed Processing Symposium, IPDPS 2008, Miami, Apr ’08.

AWARDS AND HONORS

Received General Proficiency Prize for Academic Excellence

Awarded first prize for Paper Presentation- High Performance Computing at National level

technical symposium sponsored by IBM, India.

REFERENCES: AVAILABLE ON REQUEST

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