Engineer Quality Control

Faiaz Noor

*** *. **** ******, ***#*h Ph: 313-***-****

Bloomington, MN, 55420 USA abntfx@r.postjobfree.com

OBJECTIVE

Seeking Manufacturing Engineer position that will utilize my strong analytical, technical, problem solving,

designing, superior project management, communication and interpersonal skills.

SKILL SUMMARY

• Proficient in MS Office software applications (Word, Excel, PowerPoint, Microsoft Query,

Project).

• Well experienced in 8D, Failure Mode Effects Analysis (FMEA), DOE, SPC, BOM and JMP.

• Conducted various detail orientated In Circuit Testing and functionality tests on PCB board.

• W orked in fast-paced manufacturing environment, inline testing and quality control. Gained

hands-on experience in equipment installation, machinery performance, operations and process

controls.

• Designed DOE for experiments, experimented wafers in different equipments with DOEs in

Freescale Semiconductor and Cypress Semiconductor clean room and analyzed test data in statistical

software.

• Supervised & Operated Axcellis medium current Implanters, Therma probe, Applied Materials

PECVD TEOS & Pen Tools, Quantox surface charge monitor, Optiprobe metrology, Four Point Probe.

• Excellent electronics understanding and debugging skills and project management skills.

• Experienced working in team environment or individually, excellent written and oral

communication skills and ability to manage technical projects within budgeted time.

WORK EXPERIENCE

CYPRESS SEMICONDUCTOR CORPORATION, Bloomington, MN, USA 2007 – 2009

Process Engineer

• Managed 6 Axcellis Medium Current Implanter equipments and 2 Thema wave Twaves probe Tools.

• Analyzed electrical-test & yield test data and prepared technical presentations for Process Change Review

Board approval to release recipes on implanters and to increase capacity and flexibility of implanters.

• Analyzed, calculated & formulated equations for implanter internal FDC parameters limits to prevent scrap

• Worked on medium current implanter three different gas project which saves $80000 - $10000 per year

• Worked with maintenance personnel to identify root causes of down tools, implement plans for tool fix

• Provided Training to Technicians in recipe and ECN writing, troubleshoot tool from OCAP Qual charts

• Created production and test recipes selecting energy, beam current, quadrants, source magnet voltage,

and other parameters by using the Implanter Network Option server

• Wrote Perl script to retrieve parametric data from the Implanter Network Option data warehouse.

FREESCALE SEMICONDUCTOR INC., Austin, TX. USA 2006

Device Engineering Co-op

• Completed SMOS8 LVNW project successfully to reduce cost, improve manufacturing efficiency and to

develop processes to improve product yield.

• Ran statistically designed experiments for reducing plasma damage caused by CVD TEOS reactor.

• Gained hands on experience in running Applied Materials plasma enhanced chemical vapor deposition

equipment, optiprobe thickness measurement and quantox surface charge voltage metrology.

• Analyzed test data using JMP and Datapower software and used Parametric Analyzer, PROMIS.

• In depth knowledge of Freescale specific process flows, integration and design rules.

CELESTICA CANADA INC., Toronto, ON, Canada. 2004 – 2005

Test Engineer

• Performed Continuous tests on HP 3070 ICT machine for all kind of PCB boards.

• Tested ICT and functionality test. Debug analysis with test results.

• Used oscilloscope, logic analyzer and multimeters in analyzing and testing circuits.

• Diagnosed shorts or row cards defect on PCB boards Recommendation for rerouting boards.

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Faiaz Noor

300 W. 96th street, apt#2h Ph: 313-***-****

Bloomington, MN, 55420 USA abntfx@r.postjobfree.com

UNIROPE LTD, Mississauga, ON, Canada. 2002

Manufacturing Associate

• Made wire rope slings and Gator-Flex Slings.

• Performed inline testing and Quality control, Provide certification of end product.

DECO AUTOMOTIVE, Toronto, ON, Canada. 2001

Robot Operator

• Operated Robot using PLC and Kept count, countercheck with system generated count.

• Performed trouble- shoots both mechanical and electrical robot malfunction.

EDUCATION

Masters Of Science In Electrical Engineering. Wayne State University, Michigan, U.S.A 2007

• G.P.A 3.50.

Bachelor Of Science In Electrical Engineering, Ryerson University, Toronto, Canada. 2004

• G.P.A 3.20.

• Earned in Program scholarship in 2001 – 2002.

• Dean’s List in 2001 – 2002 for academic excellence.

• Awarded Membership and Certificate of Golden Key International Honor Society of Ryerson

University chapter for outstanding scholastic excellence.

Additional training, course work and software skill:

• Completed courses on fabrication in clean room & Analog I.C. Design I & II, Advance Electronics,

Power Electronics & Control, P.L.C. (Allen Bradley), Lean Operations, Statistical Process

Control.

• Experienced in C/C++, JMP, Cadence, Data Power, P-Spice, Mat-Lab, PSIM, Simulink, Verilog,

PLC-5, MAX+PLUS II, VHDL, Step-7, MS office programs, UNIX operating system.

Projects:

• Designed schematic, Layout, Test bench, Simulation in Cadence for RC-Oscillators (1/9Mghz),

ADC (R-2RladderNetwork/8bits), DAC (Binary-Weighted/4bits), High Speed Voltage Comparators.

• Designed 3 Phase and 4 wires PWM Based Active Power Filter System to compensate harmonic

current caused by loads, so power Line input current to the load is sinusoidal.

• Generated video signals using FPGA programmed with VHDL in MAX+PLUS II.

• Completed successfully Low Voltage N Well QBD failure project in Freescale Semiconductor Co-op

• Designed lead – Lag and PID Controller for the Servo System.

• Designed and build Internet connected LAN with home appliance control.

• Modeled and Design controller, state feedback for closed loop System, full and reduced orders

Observer, optimality and Simulate the closed loop system in Simulink for different conditions.

• Experienced in CMOS-Analog components design with Cadence, Schematic-Capture/Virtuoso-

IC-layout/DRC/LVS/Test-Bench/Affrima-SimulatorAnalysis, transistor level circuit design.

Personal:

• Canadian Citizen, authorized to work in U.S.A. on T.N. Status for unlimited time. (No

Sponsorship required).

• Available for a full time position immediately.

• Willing to relocate. Open to business travel.

References Available Upon Request

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