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Design Signal Processing

Location:
Los Angeles, CA, 90007
Posted:
March 09, 2010

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Resume:

TECHNICAL SKILLS

CADENCE: Virtuso Schemetic/Layout, VerilogXL, Assura, Calibre, SpectreRF, DRC, LVS, ERC,

TOOLS: IronCAD, Allegro PCB Editor, Solidworks, MathCAD, EDA

Tools,Hspice,LTspice,Spice3,Pspice,Magic,Eagle, ePD, Verilog Synthesis, IRSIM,

Synopsis,PowerView, Modelsim MXE, Mentor QuickSim, Alliance, KEIL,UMPS, XILINX FPGAs

and CPLDs, PLA( eqntott, espresso, MPLA ), VxWorks, Code Composer Studio

Processors : 8085,8086, 8051,Luminary Micro LM3S101, ARM, PIC,TMS, Blackfin, Sharc

PLATFORMS: MS Windows, MAC,UNIX, LINUX, Code Composer Studio

Languages / Softwares : Perl, C/C++, Photoshop, Assembly Language,MATLAB, SIMULINK,

LABVIEW, Rice Wavelet Toolbox, Wavelab, LastWave, Wavekit, Mathworks, Liftpack., Matlab

Wavelet Tolbox, WaveL software,

WORK EXPERIENCE ( MSEE with 3+ years experience)

: Bharat

Electronics Limited(06/12/2007 through 07/18/2008) – mixed signal IC design engineer (full-

time)

Bharat Electronics Limited (05/16/2009 through 08/06/2009 ) – graduate technical intern

Central Training and Research Institute (01/06/2005-12/21/2006) - DSP ARCHITECTURE,

SIGNAL PROCESSING

PROJECTS

:

ANALOG / MIXED SIGNAL DESIGN:

MIXED ANALOG-DIGITAL BROADBAND IC FOR INTERNET POWER-LINE DATA

SYNCHRONOUS LINK: a prototype was developed for high speed communications through power

lines. Focus : improvement of data rate.

EMBEDDING ADC ON DIGITAL TELECOM ASICS: digital noise and its effect on ADC analyzed and

modeled.

VIDEO DECODER PLATFORM: An IC was developed to capture video signal and decode the information

in it. The SNR vs accuracy of decoding in analog and digital video sources was measured.

DESIGN OF 12-BIT PIPELINED ADC USING 0.18 um CMOS TECHNOLOGY : low-voltage low

power fully differential operational amplifier was developed. A switched-capacitor gain amplifier was

developed followed by the development of a 12-bit pipelined ADC stage. The last step was the development

of the three MSB stages of the pipelined ADC.

Research and development of analog mixed signal blocks for semiconductor ICs.

Design and simulation of mixed-signal circuits.

VLSI DESIGN: SRAM design; DRAM design

DIGITAL SIGNAL PROCESSING (and related topics):

WAVELETS- BASED MC-CDMA SYSTEM: the system spreads energy in all available sub-channels. It

also performs multi-carrier modulation using orthogonal filters optimized based on their time-frequency

characteristics.The filters are implemented with M-band wavelet based system in a form of cosine

modulated filters (this helps perfect reconstruction).

MMSE ESTIMATION MULTI-USER DETECTION FOR CDMA BASED ON WAVELET

TRANSFORM:

The receiver is based upon time-frequency processing dictated by a canonical representation of WSSUS

channel model. Multi-path Doppler processing improves diversity thereby improving the performance.

INVERSE HALFTONING USING NONORTHOGONAL WAVELETS: edge information in the

highpass wavelet images of a halftone image is used for inverse halftoning. Cross-scale correlation in multi-

scale wavelet decomposition is used to remove background halftoning noise while preserving important

edges in the wavelet lowpass image.

STEGANOGRAPHY (MATLAB,C integration of JPEG2000 lossy compression scheme and BPCS

steganography without compromising the desirable features of any of them. It overcomes lack of robustness

in other BPCS schemes .

ADAPTIVE SUBBAND CODING (MATLAB, C++) ; OPTICAL CHARACTER

RECOGNITION(MATLAB, C++)

DEVELOPMENT OF SEGMENTATION ALGORITHM FOR CONTENT BASED IMAGE

RETREIVAL

Current projects: ADPCM; baseband modem (DSP DESIGN)

DIGITAL COMMUNICATION AND NETWORKING

LNA DESIGN: a CMOS LNA was designed using 0.18um technology ( center frequency: 2.425 Ghz).

The LNA can adapt to standard cell frequencies. It supports 3G modulation schemes (eg: 16QAM) and data

rates.

ZIGBEE BASED RETAIL STORE. The store’s Zigbee mesh was simulated using OMNET++.

IMPLEMENTATION OF VITERBI ENCODER AND DECODER, HUFFMAN CODER, LZW AND

QM CODERS

SIMULATION and PERFORMANCE EVALUATION OF A DIGITAL COMMUNICATION

SYSTEM (end to end): performance is evaluated based upon the change in modulation format.

Analysis of communication systems operating from very low to optical frequencies. Comparison

of modulation and detection methods. System components description. Optimum design of

communication systems

EDUCATION and AWARDS

:

MSEE University of Southern California, Los Angeles, CA GPA :

3.9/ 4

( IC design, RF design, VLSI design, computer architecture, DSP, networking, communications) :

FALL 2009

BS M.S.RAMAIAH INSITUTE OF TECHNOLOGY GPA :

80%

ELECTRONICS AND COMUNICATION ENGINEERING: DECEMBER 2007

Junior Mathematics Olympiad-23rd ; National Level Science Talent search Exam-54th;2nd national Level

Science Olympiad-9th

AREAS OF FOCUS ( practical experience)

:

VLSI: CMOS circuits, MOS transistor theory, CMOS processing technology, CMOS fabrication, design

rules, CMOS physical design, circuit characterization and performance estimation; resistance and

capacitance switching characteristics, delay and inverter chains, Nand/Nor delays and power consumption,

CMOS circuit/logic design, clocking strategies, dynamic logic. Integrated circuit fabrication; circuit simulation;

Actel, anti fuse, Asic, PCI Bus Protocol. layout: structured chip design and timing; silicon compilers;Non-

linear integrated circuits, data-converter architectures and implementations,PLDs, regenerative logic circuits,

ADC,DAC, digital displays, memories and interface logic circuits.ASIC design, FPGAs, VHDL, verilog, test

benches, simulation, synthesis, timing analysis, post-synthesis simulation, FIFOs, handshaking, memory

interface, PCI bus protocol, CAD tools

ANALOG: MOS technology canonic analog cells, Analog multipliers MOSFET operation and models;

voltage references and biasing; design techniques for high-speed operational amplifiers and RF amplifiers,

oscillators, comparators and transconductors; compensation methods,Physical and circuit-level modeling of

PN junction diodes,BJT saturation logic families, current-mode logic families.Bipolar and MOS IC fabrication

technologies, MOSFET small signal models (low and high frequency), Single- and multiple-transistor

amplifiers, Current mirrors, active loads,Class A, B and AB output stages for IC, Frequency Response and

noise in IC, Frequency response and stability of feedback amplifiers. Experience with Power Management

LDOs, Switch Mode Power Supply, Battery chargers, LED drivers, Charge Pumps.Lithography, Diffusion &

Ion Implantation, Etching (Wet & Plasma), Metallization, Clean room based microfabrication and laboratory

techniques for IC processing, Electrical characterizations of PN, Schottky diodes, IC resistors, Transmission

Line Measurements, MOS capacitors, & MOSFETs in a laboratory setting. Electronic packaging technology,

Noise and electromagnetic interference, Circuit-board layout techniques, PCB, Feedback circuits, AC/DC

power .

LVDS, LVPECL, CML, PCI-Express, SATA, HDMI, MIPI, Xaui, USB2.0, FBDIMM, Infiniband, LDT,

HyperTransport,; design of op-amps, bandgap, differential amplifiers, VCO, PLL, high speed tranceivers;

Digital Signal Processing:

dsp design lab:Architecture:FIR-IIR Filters,FFT:Adaptive Filtering,Code optimization: Multirate Filtering;

digital image processing: Image Enhancement,Image Compression,entropy,Noise Removal,Edge

Detection, Morphological Processing,Digital Halftoning, Geometrical Modification,Texture Analysis, Object

Shape Recognition, Color Image Processing, Image Restoration,Image Sampling and Transforms,Image

Watermarking and Data Hiding,Image Indexing and Retrieval;Shannon-Fano coding, Huffman coding,

adaptive Huffman coding, QM codec, context-based QM coder; Lempel-Ziv codec; Audio and speech

compression;Scalar and vector quantization; JPEG and JPD-2000 still image compression;JPEG-2000 still

image compression; MPEG-1, -2, -4 and H.26x (as H.264) video compression standards; Fast motion

search algorithm; Pre- and post-processing techniques, deblocking filters, deranging filter, rate control

techniques; Multimedia delivery/streaming over wired and wireless networks;Multimedia content protection,

encryption and watermarking, MPEG-21;wavelets: Signal representation using bases. Hilbert spaces.

Orthogonal, bi-orthogonal basis and overcomplete expansions.representing ;Compressed sensing; Multirate

signal processing. Filterbanks and discrete wavelet transforms. Time domain, frequency domain and

polyphase domain representations.Channel orthogonal filterbanks. Iterated filterbanks. Bi-orthogonal

filterbanks. Lifting factorizations. Multichannel filterbanks. Modulated filterbanks; Multidimensional wavelets.

Edgelets, bandlets, ridgelets and other extensions. Lifting for video representation; Continuous time

wavelets. Series expansions of continuous signals. Haar, Sinc, Meyer, Daubechies and Spline wavelets.

Mallat algorithm.

MOBILE COMMUNICATION:Cellular System Design : Large-scale channel models (path loss and

shadowing); Multiple access techniques; Channel assignment; Reuse and sectoring; System Capacity;

Spread spectrum techniques as applied to CDMA; Small-scale channel models (multipath fading); Diversity,

Resource allocation (channel assignment, call admission, etc.); Protocols for data-oriented networks;

Mobility management and hand-off; CDMA, GSM, GPS,digital communication system design, embedded

systems (design), DSP, radio access technologies(WLAN, MANET, SENSORS, GPS), software, middleware

and applications of mobile systems (OS,JINI,UPnP,P2P,VoIP,IPTV,WPKI,WAP,grids,clouds,ubiquitous

computing), wireless mesh networking,2G,3G and 4G devices.Modulation and detection techniques(QAM,

OFDM etc Noise, Antennas & propagation, microwave transmission through circuit elements and

channels, Link Budgets, SNR, BER, data rates, Wireless Systems Hardware, Cell phones, Satellite

Communications, WLAN,

PLL; Linear Tracking Theory; Nonlinear Performance of Phase Locked Loops; Carrier Coherence in

Suppressed Carrier Digital Waveforms; Synthronization Theory - Bit Synthronization; Maximum a Posteriori

Receivers; Optimal Analog Receivers; Acquisition of Random Systems



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