Design Engineer

SUNNY MISHRA

*** ******** **** *****, ******, OH 45701 Phone # 740-***-**** abnqq6@r.postjobfree.com

CAREER OBJECTIVE: Seeking a full time position to work as a design engineer.

RELEVANT EXPERIENCE:

Osram Sylvania, Inc., Saint Mary’s, PA September 2008 – January 2009

Design Engineering Intern

Part of a major initiative involving design enhancements and customizations of new LEDs adopted by the company to replace

traditional street- lamp technology. As an integral member, in a team of four, responsible for designing, testing and subsequently

presenting results and recommendation to a committee

• Imported specifications pertaining to the LEDs into unigraphics NX2 design tool to compile and subsequently establish a

prototype. A sample was subsequently generated and stress tested by the team to ascertain its viability. Any failed designs were

further fine tuned, tested before establishing the end product for manufacturing

• As part of the stress testing compiled data for about 15 samples in spreadsheets to illustrate their life cycles across different

input parameters including voltage and current

• Presented the findings as well as recommendations to various department heads as well as key customers

• During the latter part of the internship stress tested randomly selected samples of incandescent lamps with 430 SS fuse wires to

be rolled out the by the company. Stresses in the form of various AC and DC voltages were applied and subsequently evaluated

using Fluke 125 SCOPOMETER. Implementation of such a technology was to result in considerable cost savings (approx.

$200K per day) for the company

Electrical Engineering Department, Ohio University, Athens, OH November 2006-August 2008

Research Assistant

• Thesis topic: “Computer simulation and modeling of transmembrane proteins”

Taurus Agile Technology Pvt. Ltd, India May 2005 – November 2005

Design Engineering Intern

Taurus is a Manufacturing firm which is Customer Focused, Innovative and Global Corporate. It produces high quality of products

and facilitates continual improvement and enhances the customer experience

As part of the project was responsible for designing the mechanical piston rotation mechanism using ProE, AutoCAD and

CATIA V5 designing tools.

– Initially designed the exploded assemblies like Base Housing, Cylinder Housing, Crank Shaft, Piston Rod, Piston, Pin,

Pulley, Handle, and Screws.

– Designed the Base Housing and Cylinder Housing Individually.

– Designed the Individual Parts like Crank Shaft and Piston Rod.

– After designing the individual parts connected Crank Shaft to Housing, Piston Rod to Crank, and Piston to Housing.

– Connected Piston Pin to Piston

– In the planer connection the connection was done between Piston Rod to Center Plane of Housing and the piston works.

EDUCATION:

Ohio University August 2008

Master of Science, Electrical Engineering - GPA: 3.43/4.00

Inderprastha Engineering College, India

B.Tech, Electronics and Communication, June 2006

COURSEWORK:

• SIX SIGMA,VLSI I & II, VHDL Design, Computer Architecture, Multimedia Communication, Digital Communication,

Analog Communication, Computer Analysis of Circuits, Digital Signal Processing, Digital Integrated Circuits, Analog

Integrated Circuits, Advanced Semiconductor Devices, Nano-Technology, Micro Nano Fabrication

PROJECTS:

• Designed and Implemented 8 bit complex multiplier IC using mentor graphics May 2007

– Integrated FPGA design of Adder, Subtractor, and Multiplier. Performed pre and post layout simulations after removing

the errors due to LVS and DRC. Added pads to the final symbol and simulated successfully

• Designed and Implemented 8 bit Ripple Carry Adder using mentor graphics March 2007

– ALU chip was fabricated by MOSIS and tested for functionality

– Performed Timing Delays, Area Optimization, and Power Dissipation analysis

• Developed SPICE like simulator circuit using MATLAB September 2007

– Programmed analog circuit of R, L, C, Voltage Source, and Current Source

– Programmed other components like Transistor, Operational Amplifier

• Developed VHDL code for Universal Serial to Parallel Converter in XILINX ISE 6.1 tool and demonstrated the same in

Spartan-3 board September 2007

– Coded Serial to Parallel and vice versa, Serial to Serial, Parallel to Parallel Converter in Xilinx

– Integrated all the four components inside the same process and controlled through MODE switch

– Successfully demonstrated the converter design in Spartan-3 board

TECHNICAL SKILLS:

• Programming Languages: VHDL, Matlab, C, Fundamental Perl Programming; Tools : TCAD,Modelsim, Unigraphics NX2,

PSPICE, Mentor Graphics Design Architect, IC Station, Xilinx ISE, Spartan 3 Board, Active HDL, Matlab

• Operating Systems: UNIX, Windows, LINUX

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