Mechanical Engineer

Lei Nie

Ph.D. Candidate, Dissertation defense finished on Sept 23, 2009.

Email: ****.*.***@*****.***; Cell Phone: 1-213-***-****

Current Address: *** * **** *** ** Apt G, San Gabriel, CA 91776

Objectives

Seeking an engineer position in reliability, electronic packaging and assembly

Summaries

• Comprehensive understanding of reliability for engineering products in terms of

mechanical/material/thermal properties

• Abundant knowledge of electronic package and assembly

• Extensive experience in conducting test design, accelerated testing and reliability data analysis

• Successfully handled responsibilities for project management and report/presentation

• Excellent teamwork and communication skills in a diversified group

Education

08/2006 – Present Ph.D. Student, Mechanical Engineering,

University of Maryland, College Park; GPA: 4.0/4.0

09/2003 – 07/2006 M.S., Electronic Science and Technology,

Tsinghua University, Beijing, China; GPA: 3.6/4.0

09/1999 – 07/2003 B.S., Materials Science and Engineering,

Tsinghua University, Beijing, China; GPA: 3.8/4.0

Professional Experience

Graduate Research Assistant in Center for Advanced Life Cycle Engineering (CALCE) research center at

University of Maryland (08/2006 – Present)

• Designed and conducted accelerated life testing for lead-free, tin-lead, and mixed (lead-free component

soldered with tin-lead paste) assemblies: thermal cycling and mechanical tests

• Performed failure analysis and root cause analysis on electronic products to identify failure mode and

mechanism

• Conducted quality evaluation of electronic components, lead-free assembly, tin-lead assembly, and mixed

assembly under non-destructive and destructive tests

• Prognostic and Diagnostic Analysis of Multilayer Ceramic Capacitor (MLCC) under Temperature,

Humidity, Bias (THB) testing using Mahalanobis Distance

Graduate Research Assistant in Institute of Microelectronics at Tsinghua University, Beijing, China (09/2003 –

07/2006)

• Designed and achieved redistribution and lead-free bumping of wafer level packaging

• Accomplished manufacturing and failure analysis of surface metallization of first level packaging.

• Performed ion contamination analysis of electronic devices.

Professional Skills

• Equipment: Optical Microscope, Scanning Acoustic Microscopy (SAM), Environmental Scanning

Electron Microscopy (ESEM), X-ray Microscopy (2D and 3D), X-ray Fluorescence Spectroscopy (XRF),

Cross-sectioning, High Performance Liquid Chromatography (HPLC), DAGE Bond Tester (pull and shear

tests), Thermo-Mechanical Analyzer (TMA), Event Detector, Data Logger, Metallization Deposition

(sputtering, electroless plating and electroplating), Plasma Enhanced Chemical Vapor Deposition (PECVD),

Lithography, Wet and Dry Etching, Wire Bonding.

• Analysis Techniques: Failure Mode and Effect Analysis (FMEA), Failure Modes, Mechanisms and

Effects Analysis (FMMEA), Accelerated Testing and Product Qualification, Design of Experiment (DOE)

• Computer: PowerPCB, calcePWA, Weibull++, MATLAB, MINITAB, Visual C++ and Microsoft Office

• Language: Fluent in English and Chinese

• Other skills: Abundant public presenting skills (present once per month in CALCE research group,

presented in five international conferences), good leadership and cooperation (participated in seven long-

term projects in variety fields)

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Lei Nie

Ph.D. Candidate, Dissertation defense finished on Sept 23, 2009.

Email: ****.*.***@*****.***; Cell Phone: 1-213-***-****

Current Address: 132 E Live Oak St Apt G, San Gabriel, CA 91776

Activities and Awards

• The Charles Hutchins Educational Grant, co-sponsored by the SMTA and Circuits Assembly magazine,

2008

• Graduate Scholarship, University of Maryland, 2006-2008

• Lam Research Best Paper Award, 2005

• Excellent graduate student scholarship, Tsinghua University, 2004-2006

• Excellent undergraduate student scholarship, Tsinghua University, 1999-2003

• Surface Mount Technology Association student member, 2008-2009

• IEEE Association student member, 2003-2009

Publications

• L. Nie, M. Osterman, M. Pecht, F. Song, J. Lo and S.K. Lee, “Solder Ball Attachment Assessment of

Reballed Plastic Ball Grid Array Packages”, IEEE Transactions on Components and Packaging

Technologies, in press.

• L. Nie, M. Osterman, and M. Pecht, “Assessing Reliability of Reballed Ball Grid Array Assemblies under

Temperature Cycling Test”, SMTA International Conference, October, 2009.

• L. Nie, M. Dong, J. Cai, M. Osterman, and M. Pecht, “Interfacial Reaction of Reballed BGAs Experienced

Isothermal Aging”, Proceedings of the 10th International Conference on Electronics Packaging Technology,

Beijing, China, August 10th- August 13th, 2009.

• L. Nie, M. Osterman, M. Pecht, “Copper Pad Dissolution and Microstructure Analysis of Reworked Plastic

Grid Array Packages in Lead-free and Mixed Assemblies”, Journal of Surface Mount Technology, April-

June 2009, Volume 22, Issue 2, pp. 13-20.

• L. Nie, M. Osterman, and M. Pecht, “Copper Pad Dissolution and Microstructure Analysis of Reworked

Plastic Grid Array Assemblies”, Proceedings of IPC APEX 2009, Las Vegas, NV,March 31-April 2, 2009,

S08-01.

• L. Nie, M. Osterman, M. Pecht, F. Song, J. Lo and S.K. Lee, “Solder Ball Attachment Assessment of

Reballed Plastic Ball Grid Array Packages”, Proceeding of IPC APEX 2008, Las Vegas, Nevada, March

30th – April 3rd, 2008.

• L. Nie, M. Azarian, M. Keimasi, and M. Pecht, “Prognostics of Ceramic Capacitor Temperature-Humidity-

Bias Reliability Using Mahalanobis Distance Analysis,” Circuit World, Vol. 33, No.3, 2007, pp. 21-28.

• L. Nie and M. Pecht, “Regulations and Market Trends in Lead-free and Halogen-free Electronics”, Circuit

World, Vol. 33, No. 2, 2007, pp. 4-9.

• L. Nie, J. Cai, X. Peng, N. Zhang, S. Wang and S. Jia, “A Study of Intermetallic Compounds in Tin Bumps

during Multi-Reflows”, Proceedings of the 7th International Conference on Electronics Packaging

Technology, Shanghai, China, August 26th-29th, 2006, pp. 1-4.

• L. Nie, J. Cai Z. Fang S. Wang and S. Jia, “Tin Bumping for Wafer Level Lead-free Packaging”,

Proceedings of the 6th International Conference on Electronics Packaging Technology, Shenzhen, China,

August 31st – September 2nd, 2005, pp. 79-83.

• L. Nie, J. Cai, S. Jia and S. Wang, “Plasma Cleaning and Its Application in Microelectronics Packaging”,

Semiconductor Technology, Vol. 29, No.12, 2004, pp. 30-34.

• L. Nie, “Hybrid Microelectronics and Multi-Chip Module Technology”, Book chapter translation, 2004.

Paper Review

Invited to review paper submissions for

• Microelectronics Reliability

• IEEE Transactions on Components and Packaging Technologies

Reference

• Prof. Michael Pecht, Chair Professor and Director of CALCE Electronic Products and Systems Center at

University of Maryland, College Park, USA. (email: *****@*****.***.***; phone: 1-301-***-****)

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