Manager Project

Resume of Stephen M. Rusinko Jr.

***** **** ***** *****

Chester, VA 23836

Phone: 804-***-****

SUMMARY

An accomplished engineering and operational executive leader who

consistently and successfully demonstrates the ability to identify

opportunities, improve operations, implement excellent execution and

deliver measurable results in a high volume, fast paced, state-of-the-art

technical environment.

HIGHLIGHTS OF QUALIFICATIONS

+ Director of Operations and Engineering with proven Leadership and

Accountability of multiple departments

+ Successful $1.5B 300mm Semiconductor Factory Startup and Volume Ramp

+ Large Capital ($300M+) and Expense ($30M+) Budget Management

+ Yield increases from Process Improvements and Defect Reduction projects

using advanced Six Sigma methods

+ Improved cycle time, efficiencies, cost of products and tool

availability using lean manufacturing methodologies

+ Six Sigma Black Belt who is Champion and Mentor of multiple Black Belt

Projects and Quality improvements focusing on prevention, early detection

and root cause solutions

+ Effective Project Management skills resulting in consistent success

+ Experienced, capable and effective communicator to all levels

+ Organizationally adaptable with excellent teamwork skills

+ Governed preparation and implementation of successful ISO 9000

certifications across multiple facilities

+ Successfully mentored three direct reports to Director positions within

three years

PROFESSIONAL EXPERIENCE

DIRECTOR OF 300MM ENGINEERING OPERATIONS

OCT 2007-JUN 2009

QIMONDA, RICHMOND, VA

+ Provide strong leadership of Lithography, Etch and Metrology

engineering organization comprised of 5 sections with ~200 Process

Engineers, Equipment Engineers and technicians in a $1.5B, fully

automated, semiconductor manufacturing factory

+ Direct continuous improvement for all Key Performance Indicators

(KPI’s) including cycle time, cost reductions, productivity improvements,

capacity increases, defectivity reduction, quality and yield

+ Develop and lead organizational goals and initiatives to drive

benchmark capital and headcount efficiencies –results include capacity

increases over 10% with a cycle time reduction of 25% while increasing

yield and quality

DIRECTOR OF 200MM AND 300MM OPERATIONS

OCT 2003-OCT 2007

INFINEON/ QIMONDA, RICHMOND, VA

+ Managed all Etch, Films and Implant process, equipment and

manufacturing organizations for both 200mm and 300mm factories with 8

sections of 600+ engineers, technicians and operators

+ Developed factory organization strategy that aligned operations,

process and equipment departments to drive outstanding factory

performance

+ Leadership for developing manufacturing and line control systems for a

world class, fully automated factory during start up and volume ramp

+ Accomplished successful 300mm start-up and volume ramp while leading a

high volume 200mm factory in parallel

SECTION MANAGER - 200MM TECHNOLOGY DEPARTMENT

JAN 2001-OCT 2003

WHITEOAK/INFINEON, RICHMOND, VA

+ Developed transfer and synchronization procedures for technology

transfers within fab cluster of 4 factories in three continents

+ Developed process change control system for all Richmond organizations

+ Successfully transferred and ramped 140nm DDR process with record

yields and record time to qual

+ Key Member of Leadership team governing ISO 9000 preparation and

successful audit for facility

DEVICE & TECHNOLOGY ENGINEERING STAFF MANAGER (DIRECTOR)

FEB 1998 – JAN 2001

MOTOROLA MOS13, AUSTIN,TX

+ Leader of MOS13 Integration and Technology Engineering organization

comprised of 4 sections of 40+ Process and Device Integration Engineers

developing state-of-the-art .13 - .20um CMOS technologies with Copper

metallization

+ Leader of Device Engineering organization composed of 4 sections of 55+

engineers and technicians in New Part introductions, Yield Enhancement,

Technology Development, Process Integration, Defectivity reduction and

Process transfers on .20 - .50um CMOS and SRAM technologies

+ Manager of MOS13 Failure Analysis Lab including SEM, TOF-SIMS, SIMS,

FIB TEM and sample prep

+ Key Member of Leadership team governing ISO 9000 preparation and

successful audit for facility

DEVICE ENGINEERING SECTION MANAGER

1996-1998

MOTOROLA MOS2, AUSTIN, TX

+ Leading device engineers and technicians in Yield Enhancement, New

Product Introductions, Failure Analysis and line sustaining on .8 -

1.0um, 1.2um and 1.5um technologies in high volume manufacturing

environment

FOUNDRY PROJECT MANAGER

1993-1996

MOTOROLA MCTG, AUSTIN, TX

+ Responsible for initial contact, foundry evaluation, contract

negotiations, technology transfers and production ramps for Motorola MCTG

Foundry activities

+ Successfully negotiated foundry contracts for five foundries in North

America, Canada, the Middle East and Europe

+ Effectively accomplished multiple, technology transfers and production

ramps ranging from .65um CMOS to 5um Metal Gate

DEVICE ENGINEER

1991-1993

MOTOROLA MOS2, AUSTIN, TX

+ Yield Enhancement, Failure Analysis and line sustaining for 1.5um CMOS

process and products

+ Established MOS2 Defect Reduction Program including generation of

bitmapping software and KLA inspections for 1.5um technology

YIELD ENHANCEMENT ENGINEER

1987-1991

HONEYWELL/ATMEL, COLORADO SPRINGS, CO

+ Yield Enhancement, Failure Analysis and line sustaining for 1.5um CMOS

and 3.0um BiCMOS process and products.

+ Software generation of Keithley Wafer Level Parameter testing for all

products (EEPROM, EPROM, EPLD, Gate Array, CMOS and BiCMOS)

AWARDS & CERTIFICATIONS

+ U.S. Patent 7,402,487 – “Process for Fabricating a Semiconductor Device

Having Deep Trench Structures”

+ U.S. Patent 6,818,534 – “DRAM Having Improved Leakage Performance and

Method for Making Same”

+ Six Sigma Black Belt –Virginia Commonwealth University (VCU)

+ Project Management Program –Virginia Commonwealth University (VCU)

+ Infineon Leadership Award 2003

+ Paper "Method of Simultaneous Late ROM Programming and Peripheral

Circuit Selection Using Nitride Spacer", published 1998, Technical

Developments, Vol 35.

+ Paper “ New Method of Late ROM program using Nitride Spacer” published

April 1997, Def Publication SE90528A

+ Motorola Scientific and Technical Society Award

+ MCTG External Fabs Appreciation of Contribution Award - 1995

+ MCTG Recognition Award for Western Digital Acquisition - 1995

+ Special Recognition Award from FACT Division – 1993

+ MOS2 Technical Excellence Award - Most Outstanding Contributor - 1992

FORMAL EDUCATION

+ University of Colorado: Bachelors of Science – Electrical Engineering

(BSEE)

CONTINUOUS EDUCATION

Six Sigma Green Belt, Six Sigma Black Belt, DMAIC, DMADV, Mini-Tab, 5S,

SMED, Lean Manufacturing, Project Management, Design for

Manufacturability, Leadership Development, Global Management Development

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