Engineer Manager

***** ******* *****:

House Loop 214-***-****

LandOLakes, FL Email:

***** ********@hotmail.

com

Mario R Faria

Seeking strategic position in electronics/semiconductor

Objective industry as product manager, operations technical manager, or

program manager with emphasis in product development. Position

should utilize technical knowledge and skills, operations

experience, and have a direct business impact. Professional

Experience growth opportunities path to director or vice-president level.

October 2007 - Present ITT Corporation

Palm Harbor, FL

Product/Project Engineer

Project engineering include planning, scheduling, vendor

contractor selection, and resource allocation for project with

program management team

Strong interaction with RF/Digital ASIC design teams to have

design for test and design for manufacturability guidelines in

place on new designs

Project management tasks such as parts selection and

procurement (BOM management), system in package design software

and hardware interaction, design package control management

documentation ownership, functional test analysis

Product management for ASIC's product include planning,

scheduling, cost, vendor selection, product

prototype-to-production process, test spec and qualification

plans

ASIC foundries technical understanding of RF and Digital

process specs to be able to pick right technology for desired

customer application needs

Present customers manufacturing process flow including volume

forecasting and cost to ramp-up volume, market internal design

and manufacturing capabilities and provide strategic

positioning conceptual maps of ITT against competitors

Work closely with Business Development team in estimating

potential projects cost via ROM for IC design and/or

miniaturization system-in-package assembly solutions

Maintain vendor relationship and continue researching and

making sure vendors maintain ITAR compliance

Assure of best achievable product profit margins by test time

reduction, lower cost test (ATE) solution and vendor

sub-contractor negotiated costs

Work closely with production assembly line to assure ASIC

designs meet manufacturing requirements

Core team member on two Six-Sigma Green Belt projects for IC

design team

August 2006 - October 2007 Texas Instruments, Inc

Dallas, TX

Technical Lead Engineer

Managed technical activities for team of 6 product engineers

and 8 projects for biggest TI ASIC customer Cisco Systems

Reported to senior management and customers project status and

achievements

Co-developed standardize procedures for best practices in

design for test (DFT)

Weekly interaction with manufacturing facility in the

Philippines, monitor yield reports, suggested process

improvements

Assisted junior engineers in professional development, reviewed

and schedule tasks to improve skill sets, identified

strengths/weaknesses and communicated with section manager

Represented ASIC product development team during vendor's

technical meetings, roadmap reviews, and external industry's

conference on IC design and test

October 2004 - August 2006 Texas Instruments, Inc

Dallas, TX

Product Development Engineer

Highly integrated devices with short time cycles to release to

production, fast pace environment with ability to multitask

across different devices

Hardware/Software development of new ASIC devices with complete

engineering characterization analysis of initial silicon

Process characterization, qualification, release to production,

ramp-to-volume

Production release offloads with multiple overseas trips to

ensure quality handoffs to production sites, work cross

functional with engineering teams Part of profit enhancement

team - concentrate on improving device cost of business

margins, contributing to bottom line PFO for business group

Device optimizations to test times, burn-in reduction, yield

improvements and/or ATE platform conversions for less expensive

test cost

Collect and analyze data and reliability stress data to

identify gaps in design performance, quality and reliability.

Identification and implementation of containment and corrective

actions to resolve gaps

Work closely with external customer and quality engineering on

field returns to ensure right test coverage in place in

production release programs

June 2002 - October 2004 LTX Corporation

Dallas, TX

Applications Engineer

Product engineer support for ASIC group at customer, Texas

Instruments. Responsible for device development from hardware

design/test program development to analysis, yield tracking and

solving test related issues

LTX Fusion HF semiconductor tester applications support for

Sparc architecture technologies at customer site, Texas

Instruments.

Custom test code development for different applications for

SRAM testing

Memory custom methods development using e-fuse repair and Die

ID on 90nm device

White paper for e-fuse programming methodology using LTX Fusion

Platform.

Support for production and engineering groups for

hardware/software tester issues

Performance Evaluation between LTX VX250/VX4 Fusion testers on

Sparc Device

April 2000 - June 2002 IBM Microelectronics

Essex Junction, VT

Test/Characterization Engineer

Synchronous DRAM design verification for .14um technology:

Full product development including initial hardware test and

characterization of different process split material

Development and maintenance of ATE code (Teradyne & Advantest)

for test programs

Full ownership of crucial parts of design verification package:

Signal Margin Analysis by varying chip internal voltages and

checking to see at what point part starts to show failures

E-fuse optimization for best voltage/timing conditions required

for 100% fuse success

Fails characterization for root cause analysis for design team

and/or process engineering team

Education August 2008 - April 2010 University of Florida

Gainesville, FL

Master's in Business Administration - E-MBA Candidate

Relevant courses: Positioning/Branding Marketing, Risk and

Crisis Management, Operations management.

August 2000-July 2002 Walden University

Minneapolis, MN

M.S. in Electrical Engineering with emphasis in Integrated

Circuits

August 1995-December 1999 Florida State University

Tallahassee, FL

B.S. in Electrical Engineering

Skills

Bilingual - Spanish

Leadership skills, Project management, Excellent communication

skills, Adaptive team-player, natural analytical skills

C programming, UNIX, Matlab, Max + Plus, VHDL, SAS/Data

Analysis, JMP

ATE Teradyne j990 series, Advantest 5500 series, LTX Fusion

HF/EX, VLCT TI Testers

Microsoft Office, VISIO, Lotus Notes, VM, Risk Analysis tools

(Analytica, Crystal Ball), Solver-Optimizer

Quality Skills: Six-Sigma concepts knowledge, ISO 9000 and 5-S

process understanding

Interests

Rho Alpha Chapter founder of Sigma Lambda Beta International

Fraternity, Inc

Institute of Electronics and Electrical Engineers member

National Society of Hispanics MBAs member

Professional mentoring program for minority undergraduate

students

Contact this candidate