Engineer Electrical

John Webb

**** **** ******

Coral Springs, FL. **067

Cell 754-***-****

***********@*****.***

OPENING STATEMENT

Seeking a position in design and development of products. Enjoy hands-on,

practical aspects and people involvement.

SKILLS

Mentor Graphics Design Capture and Expedition PCB, PCAD, View logic for

windows, Xilinx FPGA tools, Lattice ISP PLD tools, VHDL, tcl, ABEL,

palasm, PADS, Orcad, Maxplus2, HP16500 Series Logic Analyzers, Agilent

Logic Wave Logic Analyzers, Motorola HDS-400 development system, UNIX, C,

Pascal, Fortran, Basic and Assembler(Motorola 680X0, IntelX86, Intel 8051),

Microsoft Word, Excel, and Access

EXPERIENCE

Avocent, Sunrise, Florida

Senior Hardware Engineer, 2003 to 2009

Responsible for a small team to design and develop boards and FPGAs used

for Avocet's new Video compression core logic. These boards contained a PCI-

express interface to provide PC access needed during development. The

finished FPGA code was to be integrated into the ASICs of various

customers.

Previously designed, developed and released to manufacturing, a card which

provided video muxing for

A blade server. This board included two FPGAs and a PowerPC processor.

Previously designed and developed various boards and FPGAs for embedded

applications customized to specific customers.

Also, worked with overseas contract manufacturers to increase quality of

testing production units.

Also, all board designs involved design of switching and linear power

regulators.

Intellon Corp, Ocala, Florida

Contract Hardware Engineer, 2002 to 2003

Responsible for design and development of reference designs to assist

customers in using Intellon's powerline chip. These designs included USB,

Ethernet and Router modules. The reference designs involved compliance pre-

screening.

ADEPT Systems, Inc., Boca Raton, Florida

Senior Hardware Engineer, 2001 to 2002

Responsible for design and development of a board which provides a

reconfigurable electrical system.

This box consisted of the NetSilicon Net+40 processor and a Xilinx FPGA

witch contained the physical layers for the Lontalk and the interface to

the Net+40.

Previously designed a daughter card which interfaced to a PowerPC (Motorola

860) board.

This daughter card provided a dual channel Lontalk interface.

Previously designed, developed and released to manufacturing, a gateway box

providing an interface between Ethernet and Lontalk. This box consisted of

the NetSilicon Net+40 processor and a Xilinx FPGA witch contained the

physical layers for the Lontalk and the interface to the Net+40.

MRTmicro, Inc., Boca Raton, Florida

Senior Hardware Engineer, 1999 to 2001

Responsible for design, development and release to manufacturing, a digital

camera which, produces streaming JPEG images transferred across Ethernet.

This product included, a PowerPC microprocessor (Motorola 823), video

compression chip and a CPLD for DMA control and glue logic.

Florida Atlantic University, Dania Beach, Florida

Senior Hardware Engineer, 1997 - 1999

Responsible for design of underwater power distribution system and data

multiplexer

Previously designed a custom six-channel ampere-hour instrument for

materials laboratory, which utilized three Microchip PIC microcontrollers.

Previously designed a preamp board with sixteen channels used on a

hydrophone receiver for high frequency sonar.

Previously designed power system for payload of unmanned submarine, which

included various DC-DC converters.

Intelligent Truck Project. Inc., Boca Raton, Florida

Senior Electrical Engineer, 1996 - 1997

Responsible for the design and development of the JCARD, which included a

high speed microprocessor steering data between a PCMCIA bus and two

Control Area Network(CAN) buses.

CORE Engineering, Boca Raton

Senior Hardware Engineer, 1995 - 1996

Project included the design, development and release to manufacturing, a

SCSI controller board, which consists of a RISC processor (IDT4650) and

three DMA controllers (XILINX FPGA's).Also, the design contains four

Lattice ispPLDs.

Previously designed the logic for a XILINX chip(FPGA), which interfaced a

64bit DMA bus with a 16bit SCSI controller.

Previously designed the logic for monitoring status and failures on a SCSI

back plane.

Computer Products, Inc., Pompano Beach, Florida

Project Engineer, 1993 - 1995

Designed, developed and released to manufacturing an embedded PC(Intel

486DX2-50), which plugged into and interfaced to CPI's Real Time Processing

(RTP) bus.

Previously designed, developed and released to manufacturing a board, which

interfaced a PCI bus to CPI's Real Time Processing bus. The design of this

board includes an Altera EPM7160 used for the interface control.

Previously designed parts of a two board set linked together by fiber

optic cable. Each consisted of a Motorola 68EC030 and numerous PALS. One of

the boards interfaced to the local bus (CoreBus) of a Huerikon VME68040

board. The other interfaced to the RTP bus.

Previously designed the VME and VSB interface to a reflective memory

board, which communicated via fiber to each other.Also, designed the state

machine and supporting logic to control the data flow between VME, VSB, the

memory and the serial interface to the fiber. This design was implemented

with Altera EPLD's(5000 and 7000 series).

Modular Computer Systems, Inc., Fort Lauderdale, Florida

Project Leader, 1988 - 1993

Responsible for engineering team for design and development of a CPU (using

Motorola 88110) board for a Real-Time multi processing system. Designed the

local bus interface and the secondary cache control for the CPU board.

Previously designed, developed, tested and released

to manufacturing a Motorola 68030 based system support processor. This

stand alone computer system provided development, maintenance and

diagnostic support for a multi processing system. Also, this board

contained: ETHERNET, a SCSI interface, an SDLC port, RS-232 ports and a

hardware semaphore processor. The design of this board included 5 ASIC, 46

PAL and 9 FPLS(state-machine) devices.

UNISYS Defense Systems, Paoli, Pennsylvania

Senior Engineer, 1980 - 1988

Responsible for design, development and testing of a Motorola 68020 board,

which interfaced with a Westinghouse radar processor on fault tolerant

multiprocessor system(FAA Mode-S program). The design of this board

included 29 PALS and 5 FPLS devices. Also, designed two 68K based boards;

one to simulate the radar processor hardware for software development and

another interface a CD-2 radar system to the Mode-S system by tapping onto

the internal IEEE-488 bus of the CD-2.

Previously designed digital and analog sections of a low power

microprocessor based fuse utilized in a programmable mine developed for the

Navy. Also, designed the logic for two gate arrays, two types of

deliverable test sets and a factory acceptance test set for the

programmable mine fuse.

EDUCATION

Widener University, Chester, Pennsylvania

M.S., Computer Engineering, 1987

Widener University, Chester, Pennsylvania

B.S., Electrical Engineering, 1980

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