Dawid Trawczynski, Ph.D.
Apopka, FL 32712
USA
email: abnbo7@r.postjobfree.com
phone: 407-***-****
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Citizenship: United States
Objective: To obtain a challenging research and development position in
embedded systems.
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Education
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Warsaw University of Technology Warsaw, Poland
Ph.D. in Computer Science 2004 - 2009
Dissertation: Dependability evaluation and enhancement in real-time,
embedded systems.
Research: Safety-critical network protocols, wireless networks, embedded
system dependability and reliability analysis with software fault
injection, formal methods, simulation and modeling.
University of Central Florida Orlando, USA
Master of Science in Computer Engineering 2001-
2003
Software Engineering Track
Thesis: Bluetooth scatternet routing, topology formation and link
scheduling protocol analysis, design and simulation.
University of Central Florida Orlando, USA
Bachelor of Science in Electrical Engineering 1997 -
2001
Digital Communications Track
Senior Design Project: Wireless voice activated database query system.
Project realized for Walt Disney, Inc. with support from Intersil, Inc.
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Honors
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. Polish Ministry of Science and Higher Education Grant
4297B/T02/2007/33-A for the local anti-lock braking system
dependability analysis and enhancement research.
. Polish Ministry of Science and Higher Education Grant
4297B/T02/2007/33-B for the distributed anti-lock braking system
dependability analysis and enhancement research.
. Florida Gold Seal Scholarship toward a 4 year BSEE degree for the 4.0
GPA in high school vocational electronics education program -
completed 1040 lab and lecture hours.
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Experience
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Florida Gulf Coast University Fort
Myers, USA
Consultant 08/2009-12/2009
. Consulting services for the Real-Time Embedded Engineering lab located
in the College of Engineering
. Performed installation and performance analysis of the TTTech real-
time safety-critical embedded system development platform functioning
on the PowerPC processor architecture
Warsaw University of Technology Warsaw,
Poland
Teaching Assistant 02/2008-
06/2008
. Lead a group of 12 undergraduate students studying event-based
programming in Java
. Developed original projects related to my doctoral research (i.e., GUI
interface to be used in a dependability analysis of the car's anti-
lock braking system)
MeshNetworks, Inc. (now Motorola) Maitland, USA
Design Engineer 05/2001-08/2002
. Automated test system (ATE) software design using Labview for Arachnet
packet radios
. Learned and used Xilinx, Sinplicity and Altera Verilog based
development tools for the purpose of CDMA modem design, analysis and
implementation
. Analog Devices DSP 9860 implementation feasibility analysis and
firmware development using Visual Studio C++ tool set
. Automated test system hardware design - designed and built an RF
signal switching unit to be implemented in a fully automated test
bench for 2.4-2.5 GHz ISM band
. PCMCIA board layout and OrCAD Capture schematic development
MeshNetworks, Inc. (now Motorola) Maitland, USA
Engineering Intern 02/2001-
05/2001
. RFMD power amplifier analysis and testing
. RF amplifier simulations with HP ADS
Novellus Systems, Inc. Orlando, USA
Research and Development Intern 05/2000-
08/2000
. Provided assistance in hardware upgrade - installed components to
enhance the HCM on the copper module (including upgrading the heater
table with ESC to an RF bias version), added a Reactive Etch module
(Damaclean which utilizes Hydrogen)
. Maintenance and service of physical vapor deposition (PVD) tools for
Lucent Semiconductor Inc. 0.35 and 0.25 micron fabrication process
(Shield/Target changes for M2i and Copper Inova)
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Skills
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Knowledge and experience in:
. C/C++/Java/Matlab/Simulink/Labview programming languages
. Motorola 6811 and Intel x86 assembly language
. Analog and digital oscilloscopes, RF spectrum and logic analyzers
. VHDL and Verilog hardware description languages and digital design
flow process
. Synopsys VLSI synthesis tool gained during a 4-bit self-resetting,
asynchronous FIFO pipeline project
. Real-time VxWorks operating system, VME data bus with PowerPC
processor architecture and POSIX interface
. PCI, USB, Ethernet data bus standards
. ARINC 429/629/659, MIL-STD-1553B/1773, FlexRay, IEEE 1394 (FireWire)
industrial data buses
. UML software design and documentation process
. WindRiver DIAB compiler 5.1.2, for MPC555 processor (PPC), TTTech
Build, Plan, View, Load tools for the TTP high dependability time-
triggered embedded system architecture
. Matlab-Simulink Embedded Coder and Real-Time Workshop
. Microsoft Visual Studio 6.0, 2005, 2008 for the x86 architecture, and
Green Hills embedded development debugging (ICE, JTAG, RS232) and
compiler tools for the ARM processor
. Bluetooth protocol stack
. CAN, TTCAN and TTP automotive and avionics, real-time network
protocols
. TTCN protocol specification language
. GSM, CDMA, WiMAX, Bluetooth wireless network standards
. RS485 and Siemens SiPass Entro, SR34i, DC-12, DC-01, IOR-6 door and
relay controllers
. IEEE 488 (GPIB) used in automated system design via National
Instruments LabView
. Fault mode and effect analysis (FMEA), hazard and operability studies
(HAZOP), event tree analysis (ETA), fault tree analysis (FTA)
. Analytical dependability and reliability analysis methods (e.g.,
Markov modeling)
. ISO 9000, DO-178B/254, IEC 61508, AUTOSAR
. Siemens PLC programming, SCADA
. Fluent in Polish
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Publications
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[1] Sosnowski J., Trawczynski D., Zalewski J., Safety Issues in Modern Bus
Standards, IEEE Computer, Vol. 41, No. 1, pp. 97-99, January 2008.
[2] A. Kornecki, J. Zalewski, J. Sosnowski, D. Trawczynski, A Study on
Avionics and Automotive Databus Safety Evaluation, The Archives of
Transport, Vol. 17, No. 3-4, pp. 107-132, 2005.
[3] D.Trawczynski, J. Sosnowski, P. Gawkowski, Testing Distributed ABS
System with Fault Injection, Proc. CISSE'09 International Joint Conference
on Computer, Information, and System Sciences, and Engineering, On-line
Conf., December 4-12 2009, Springer-Verlag (to be published in 2010).
[4] D.Trawczynski, J.Sosnowski, P.Gawkowski, Analyzing Fault Susceptibility
of ABS Microcontroller, Proc.SAFECOMP'08 International Conference on
Computer Safety, Reliability, and Security, Newcastle, U.K, September 22-25
2008, LNCS Springer -Verlag, pp. 360-372.
[5] D. Trawczynski, J. Sosnowski, J. Zalewski, The Effect of Large Clock
Drifts on Performance of Event and Time Triggered Network Interfaces, Proc.
DeCoS - RELCOMEX'07 International Conference on Dependability of Computer
Systems, Szklarska Poreba, Poland 14-16 June 2007, pp.344 - 351.
[6] D. Trawczynski, J. Sosnowski, J. Zalewski, A Tool for Databus Safety
Analysis Using Fault Injection, Proc. SAFECOMP'06 International Conference
on Computer Safety, Reliability, and Security, Gdansk, Poland September 26-
29 2006, LNCS Springer-Verlag, pp. 261-275.
[7] D. Trawczynski, J. Sosnowski, J. Zalewski, Fault Tolerance Extensions
of TrueTime Package for Discrete Systems Simulation, Proc. DESDes'06 3rd
IFAC Symposium on Discrete-Event System Design, Rydzyna, Poland, September
26-28 2006, pp. 79-84.
[8] D.M.Trawczynski, J.Sosnowski, J.Zalewski, Dependability Evaluation of
Real-Time Network Interfaces, Proc. of ARCS2006 Workshop on Dependability
and Fault-Tolerance, Frankfurt, Germany, March 13-16 2006, LNI GI-Edition,
pp.86-94.
[9] A. Kornecki, J. Zalewski, J. Sosnowski, D. M. Trawczynski, Safety
Issues in Avionics and Automotive Databuses, Proc. 16th IFAC World
Congress, Prague, Czech Republic, July 4-8, 2005.
[10] D.M. Trawczynski, J. Sosnowski, J. Zalewski, Review of Current Routing
Protocols in the Context of Bluetooth Scatternet, Proc. MIXDES 2005,
Krakow, Poland, June, 2005.
[11] D. M. Trawczynski, J. Sosnowski, J. Zalewski, A Study of Routing for
the Bluetooth Scatternet, Proc. PDS2004 IFAC Workshop on Programmable
Devices and Systems, Krakow, Poland, November 18-19, 2004, pp. 473-478.
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