Design Electrical Engineering
Resume:
Tianlin Xie
*** ** ** **, ********, NY, *****
******@********.****.***
EDUCATION
Polytechnic Institute of New York University, Brooklyn, NY May.2013
Master of Science Electrical Engineering
GPA: 3.6
Course Work: VLSI System and Architecture Design, VLSI Testing,
Advanced Computer Hardware Design, PCB Design,
Principle of Communication Network, DSP Lab.
Beijing Jiaotong University, Beijing Jun.2009
Bachelor of Science Engineering
ACADEMIC PROJECTS
VLSI Testing ( Python, Synopsys TetraMAX) Oct.2012
1. Used TetraMAX to generate a set of test patterns detecting all detectable faults in a given sequential circuit.
2. Inserted all scan flip- flops of the circuit in a scan- chain. Using TetraMAX to perform ATPG for this circuit
3. Wrote Python code to detect stuck at fault and calculate controllability and observability.
PCB design: EEG Analog Front End (Small Bluetooth System)
( C program, Cadence Orcad, Cadence Allegro PCB design) Oct.2012
1. A wireless system contained sensors, ADCs, MCU and wireless chip A wireless system contained amplifiers, ADCs, MCU and wireless chip, DC/DC Switching Power Supply. It was less than 18 mm in diameter 10 mm high.
2. Sensors consisted of differential op- amplifiers and low/ high pass filters.
3. Layout was draw on Cadence Allegro, using split power, ground planes.
4. Wrote C program to implement ADC and Bluetooth communication.
SoC Design: Encrypted Serial Communication chip based on AES
( VHDL, FPGA, Cadence Encounter RTL Compiler, Cadence Encounter)
April.2012
1. Wrote programs about Advanced Encryption Standard and
communication between two FPGA boards via UART in VHDL.
2. Implemented whole function on FPGA.
3. Generated gate level logic based on VHDL code and standard cell library.
4. Added commands to synthesis logic with time, area or power constraints.
5. Partitioned hierarchical designs into multiple sections for layout.
6. Run placing and routing on SOC encounter while set timing or area constrains.
7. Completed functionality verification( DRC, LVS).
DSP: Sound Source Direction Detector
( C++ program, Assembly,TMS320 C6713 DSK Board) Oct.2011
1. Used 2 Microphones to determine the direction of the source of a sound.
2. Microphones picked up the same sound with a certain delay.
3. Implemented cross correlation in C code to find out the position of max value.
4. Calculated sound source degree according to the delay- position.
Skill
Programming Languages: VHDL, C/C++, Assembly, Python
Software: Xilinx, Cadence Virtuoso IC design, Allegro PCB,Tetramax
Programmable logic device: FPGA, DSP Board
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