Engineer Design

SHRUTHI VICTOR MARIA

**** ** ****** ****, ****, Gainesville, Fl-32608

E-mail: ************@***.***

Mobile: 352-***-****

OBJECTIVE

To obtain a full time position, or an internship in the field of Electrical

and Computer Engineering

EDUCATION

Master of Science in Electrical and Computer Science Engineering GPA:

3.6

University of Florida, Gainesville, Florida

Date of graduation: May 2010

Courses Completed: VLSI circuits and Technology, Advanced VLSI design,

Wireless Communication, Computer Architecture, Bipolar Analog

Integrated Circuit Designs, MOS Analog Integrated Circuit design,

Reconfigurable Computing, Digital Filtering, Distributed Multimedia

Systems & Radio Frequency Systems and Circuits

Bachelor of Engineering in Electronics and Communications Engineering

Amrita Institute of Technology and Science, Bangalore

Grade: First Class with Distinction (75%)

PROFESSIONAL EXPERIENCE

Assistant Systems Engineer September

2007 - July 2008

Tata Consultancy Services

Bangalore, India

Worked in an offshore development project for Motorola. My responsibilities

included, working towards improving the supplier quality of Telecom

products, by analyzing the Failure analysis report and identifying methods

to improve quality. During my tenure with TCS, I have been trained in Java,

SQL/PLSQL, Unix, Microsoft Office.

TECHNICAL SKILLS

Programming languages: C, C++,

Operating System: UNIX, Windows95, 98, 2000, XP

Tools: MATLAB, Cadence, LTspice, Agilent's ADS, oscilloscope, logical

analyzer

Design Languages: Verilog, VHDL

Assembly Languages: Microprocessors (8085, 8086) Microcontroller (8051)

ACADEMIC PROJECTS

Reconfigurable Computing: Implemented a DES Encryption Algorithm on FPGA

and compared its performance with software. The FPGA implementation

resulted in a large speedup when compared to its software implementation.

For 100x64 bits of input data, a speedup of 300x was achieved. The loop

unrolling and pipelining concepts applied help achieve such a high speed

up.

Tools: VHDL, C, FPGA

Advanced VLSI: Hardware implementation of a 16 point FFT processor,

operating in sub threshold region.

This project included design of 16 point, 16 bit FFT processor using

standard TSMC 0.25?m technology and the goal was to minimize power

dissipation with reasonable throughput. Inorder to achieve minimum power

dissipation, the processor was operated in sub threshold region and also

certain power techniques like clock distribution and power distribution

were employed. The processor was designed to operate at frequency of 1.6

KHz with power dissipation of 78.6 nWatts at a supply voltage of 200mV.

Tools: cadence

Radio frequency systems and circuits: Designed a wireless data link system

capable of transmitting and receiving 1 Gbps data, with a Bit Error Rate

(BER) of 1x10-6 .The system is designed in 60 GHz ISM band, using QPSK

modulation.

Tools: Agilent ADS

Digital Filtering: Design of GSM filter and candidate tone detection

filters using a Butterworth, Chebyshev I, Chebyshev II, Elliptic digital

IIR models

Tools:MATLAB

MOS Analog Integrated Circuit Design: Design of a 5th order Butterworth low

pass filter, along with a differential output tunable transconductor and

common mode feedback circuit.

Tools:LTspice,Cadance

VLSI: designed a 16x8 SRAM.

Tools: cadence

Computer Architecture: developed a pipelined instruction set simulator

(ISS) for own custom assembly language. Additionally, implemented trace

cache optimization and wrote a technical research paper.

Language: C++.

Disaster Management & Intimation System using GSM

It is an Embedded System Project. The various parameters in the industry

such as temperature, pressure etc are monitored and if any of these

parameters goes out of predetermined range an intimation is sent to the

supervisor using GSM, and corresponding malfunctioning device is switched

off.

Tools: Embedded C, microcontroller 8051

ACTIVITIES

. Always in Top 2% of 60 member undergraduate class.

. Attended a workshop on CDMA conducted at the Indian Institute of

Science, Bangalore in April 06.

. Presented a seminar on Software Defined Radio to my undergraduate

class

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