AVE, #***, Ph: 650-***-****
Redmond, WA, abmqoc@r.postjobfree.com
98052
http://www.linkedin.com/
in/preethizacharia
Summary
. Masters graduate, Electrical and Computer Engineering, NC State,
Dec 08 Graduate
. Expertise in the workflow for digital side chip development, from
FPGA design to verification, synthesis and backend analysis
. Experienced in high speed Digital Design.
. Experience with VLSI, Digital ASIC, Embedded systems, C/Java/Perl
. Two years software experience with Information systems in Infosys,
Bangalore.
. Two internships in Firmware development.
Education
North Carolina State University, NC
Dec '08
MS, Electrical and Computer Engineering
Selected Coursework: Digital ASIC, VLSI, Digital Electronics,
Object Oriented Programming, Embedded Systems, Computer Design & Tech
Sri Jayachamarajendra College of Engineering, Mysore, India
June '05
Bachelor of Engineering, Electrical and Electronics Engineering
Selected Coursework: Microprocessor design, Digital Electronics,
Digital Signal Processing
Skill Set
Languages : C, JAVA, Perl, C++, JSP, PHP, HTML, XML, CSS, PL/SQL,
Ruby
Assembly Language : 8085, 8051, Motorola 68HC11, PIC 16F877,
Coldfire v2
Software/Tools : ModelSim, ncSim, Allegro, HSPICE, Design Vision,
Visual Studio .Net, Eclipse, Business Objects
HDL : Verilog, VHDL, System Verilog
Hardware : Oscilloscopes, Digital Multimeter
(DMM), Function Generator
Work Experience
Teridian Semiconductor Corp. Irvine, CA (now Maxim Integrated
Products) Apr '09 - Jan '10
Digital Design Engineer
Worked in the Digital Circuit Design team.
. Developed test benches in verilog to test and verify every module
of the chip from I/Os to memory, timers, SPI, ADC. Debugging
incorrect operation through simulations and waveform analysis.
. Converted assembly code targeted at an older 8-bit 8051 processor
core for use with a 32 bit Coldfire V2 processor core. Completely
automated the porting process in Perl and hence brought the
project ahead of schedule by an estimated 2.5 months.
. Extended the meter firmware by designing and implementing a Time-
of-Use (TOU) scheduler.
Elster Inc. Raleigh, NC
May '08 - Aug
'08
Firmware Development Intern
Worked as an intern in the Firmware division.
. Implemented a prototype system to get more functionality,
performance and throughput by offloading radio communication
control from the main controller to a H8S microcontroller.
. Enhanced the onboard radio sniffer to simulate multiple meters
from a single unit.
Infosys Technologies, Bangalore
Sep '05 -
July '07
Software Engineer
Worked as an offshore developer for Infosys projects for Cisco sales &
services.
. Designed, developed online support system and tools for Cisco
sales and services division.
. Managed the Business Objects and Global Claiming Tools (business
process management for Cisco)
. Worked extensively on databases in developing new universe for
Business Objects.
. Designed and developed web portal for Infosys employee information
management and documentation management system.
Academic Projects
Regular Expression matcher in Verilog
Initial prototype for this ASIC design was developed in C and final
RTL design was developed in Verilog. Achieved a speed of 800Mbps. Used
ModelSim for simulation and DesignVision for synthesis.
128 bit SRAM simulator
This project involved simulation of the operation of a 128 bit SRAM
starting from the design to schematic generation and generating a
layout of the SRAM after performing DRC and LVS checks.
Design and implementation of a sense-amp flip-flop
Developed a sense-amp flip flop operating at 5GHz clock frequency
using 45nm technology.
Programmable Waveform Synthesizer
Designed and developed a fully functional, customizable, waveform
generator using C to program the PIC 16F877A for use as a testing
device for various electrical devices.
Frequency relay using a microprocessor
Developed a device to limit the input supply frequency to a device by
using an f/V converter as a sensor and a microprocessor