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Engineer Electrical

San Diego, California, 92130, United States
June 01, 2010

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Wayne Jernigan

Home: 858.***.**** Cell: 858.***.****


An engineering specialist with solid hands-on experience in a number of

industries (Medical Technology, Defense, and High-End Server computing)

with a variety of technologies performing software development, test system

design, hardware debug, and system regression and verification testing.

Skilled as a project lead, individual contributor and a member of large

collaborative teams. Expertise working with international teams, and

worked overseas. DoD Secret Security Clearance.


Platforms: Linux, Unix, Windows, Solaris

Software: C/C++, Java, Tcl/Tk, LabWindows/CVI, Sun Forte Tools, Sun

Studio, Visual C++,

gcc and gdb, Intellitech 1149.1 (JTAG) Boundary Scan Test

Development Suite,

Unix shells, revision control software - SCCS, CVS, SVN

Hardware: Custom build test systems, blade servers, high-end enterprise

class servers, PCs.


Strong technical writing skills with experience in FDA and DoD required


Strong verbal presentation skills with experience as a classroom instructor

and in business conferences.

Strong mentor skills in training others on new equipment and technologies.


Lead POST Engineer on joint Sun/Fujitsu high-end server product at Sun


Trained all Sun support engineers on joint Sun/Fujitsu high-end server

product POST testing.

Supervised and trained manufacturing engineering team at Flextronics,

Malaysia, on the operation and diagnostic troubleshooting of a new Sun


As Lead POST Engineer on joint Sun/Fujitsu product, frequently reported

project status to all management levels up to the Executive Committee.

Work-center Supervisor and Master Training Specialist, Airborne Weapon

Systems, U.S. Navy



2000 - 2009

Staff Engineer, High End Server Engineering

Designed, developed, maintained and supported Power On Self Test (POST) and

diagnostic engineering tests on Sun servers, from Blade servers to High End

Enterprise class servers.

Designed and developed complex POST/Diagnostic tests for Sun Blade and High

End Enterprise class servers in both small and large software development

collaborative efforts made up of cross-functional engineering teams from

hardware, software, quality, and system architecture.

Developed diagnostic tests for UltraSPARC family of processors, NGDIMM and

FBDIMM memory assemblies, and custom system ASICs. Created software on

Unix and Linux platforms using C/C++, which was then revision controlled

and maintained using SCCS, CVS and SVN. Discovered and fixed bugs

throughout the entire development and regression testing process.

Supported Quality Engineering (QE) by solving complex problems of

POST/Diagnostic test failures for customer field engineering support and

manufacturing engineering teams by finding root cause of failure to

determine whether hardware or software was the source of failure. This

reduced customer down-time and limited production line stoppage, thus

minimizing impact on sales revenue.

Produced JTAG boundary scan tests for all printed circuit board assemblies,

ASICs and cable interfaces of the Sun E15K/E25K enterprise class server

using the Intellitech 1149.1 (JTAG) Boundary Scan Test Development Software

suite of tools and the C++ programming language. These provided early

detection of assembly and construction issues, thus reducing man hours

spent on Root Cause Analysis (RCA).

Trained manufacturing engineering team on site at Flextronics, Malaysia, on

how to troubleshoot POST and diagnostic test failures being experienced on

the production line of a Sun T-series server. Saved $3 Million by helping

them to find root cause of failure on systems that failed production line

testing and Reliability Quality Test (RQT) verification testing. Trained

the manufacturing engineering team on the complete POST and diagnostic test

flow and test details.

Led Sun POST engineering team on Sun/Fujitsu joint venture UltraSPARC M-

series Enterprise class servers for all Sun represented POST software bugs

and diagnostic interests. Ported complete POST source code tree from

Fujitsu over to Sun servers making the necessary changes so that it could

be compiled on the Sun servers. This enabled Sun engineers to supply

source code changes for bugs or to submit change requests at the source

code level, and to have debug capability.

Performed as direct liaison between Sun and Fujitsu POST engineering groups

on all aspects of the Sun/Fujitsu joint venture UltraSPARC M-series

Enterprise class servers. Reported to management on a weekly basis about

project status, progress and issues. Reported project status to all levels

of management up to the Executive level on a bimonthly basis.

Ported entire POST source code tree from a Sun UltraSPARC T2+ blade server

to a new server product for the Sun E15K/E25K server platform. Updated and

enhanced the source code to include the expanded capabilities of the new

server product, including an increased number of processors, more memory

and greater I/O space.

Trained all Sun engineering support members, both internal engineering

groups and field support groups, on the details of POST testing for the

Sun/Fujitsu joint venture UltraSPARC M-series Enterprise class servers at

Sun company headquarters.


1995 - 2000

Production Test Engineer, Advanced Medical Manufacturing Engineering

Designed complete manufacturing automated test systems using ATE for

production line testing of the top of the line Nellcor Puritan Bennett 840

Acute Care Ventilator.

Constructed complete test systems, including both hardware and software,

for ventilator pneumatic safety valve, power supply and backup power supply

battery, and final ventilator assembly, using a variety of interfaces

including IEEE-488.2/GPIB, serial port, Ethernet port, discrete digital I/O

signaling and custom Air/Oxygen pressure and flow pneumatic circuits.

Wrote complete software programs for test system operation, diagnostics,

calibration, maintenance, product testing, product troubleshooting and

design verification testing, using LabWindows/CVI and Visual C++.

Authored full compliment of test system documentation from initial

construction to final verification in order to meet FDA documentation and

validation requirements. This included test plans to define test

methodology, test specifications to define product performance criteria,

test reports to document operation and verification results, and validation

plans and protocols to challenge the test system design for installation

environment (Installation protocol), operational tolerances and accuracies

(Operation protocol), and performance results of fault insertion challenges

(Performance protocol).

Certified validation results using Gage Repeatability and Reproducibility

studies using a 3 Sigma acceptance model.


Electrical Engineer, Aerospace Defense Contract Engineering for U.S. Navy

Designed, developed, and integrated Test Program Sets (TPS) for F/A-18 and

E-2C aircraft component automated test systems. Secret Security Clearance.

UNITED STATES NAVY, San Diego, CA and Yokosuka/Atsugi, Japan

1988 - 1992

Aviation Electronics Master Training Specialist, and Training Plan


Developed, authored, and taught classroom curriculum for the operation,

diagnostic testing and troubleshooting of the F-14 aircraft Airborne Weapon

System. Secret Security Clearance


B.S., Electronics with Mathematics Minor, from Chapman University,

Orange, CA

Awarded: Cum Laude and Grey Key

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