ABH IJ IT PATIL

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abmq07@r.postjobfree.com ****, Town and country Blvd, Apt 4203, Frisco, Tx-75034, 850-***-****

EDUCATIONMaster of Science, Electrical Engineering Florida State University,

Tallahassee, FL, USA

Spring 2010

GPA: 3.385

Bachelor of Engineering Electronics and

Telecommunication Engineering North Maharashtra University,

Jalgaon, India

July 2006

First Class

WORK EXPERIENCE

• Research Assistant (Fall 2007 to Fall 2008)

Department of Electrical and computer Engineering

Florida State University, Tallahassee

Designed digital circuits specially filters.

Translated digital designs to VHDL.

Studied new algorithms and re-implemented them.

Performed simulations in MATLAB, VHDL.

• Teaching Assistant (Spring 2009 to Summer 2009)

Department of Electrical and computer Engineering

Florida State University, Tallahassee

Advised students for their course assignments.

Explained different ways of implementations in class through presentations.

Evaluated student’s assignments and projects.

MASTERS THESIS

“FPGA implementation of digital filter using MCM”

• To study different MCM algorithms, compare and choose best one for implementation.

• Simulate design filter in MATLAB before implementation on FPGA.

• Implementation of designed filter on FPGA chip

COURSES UNDERTAKEN

• Graduate courses: ASIC design, Advanced digital design/arithmetic, Digital signal processors,

Integrated circuit design, Advance topics in FPGA, Optoelectronics, Advanced electro-magnetics,

Signal and systems, Semiconductor and device theory, VLSIDSP.

• Undergrad courses: Electronic design, Digital electronics, Power electronics, Digital signals

processing, Principles of communications, Microwave engineering, Telematics, VLSI design,

Network analysis, Electrical machines.

PROJECTS UNDERTAKEN DURING UNDERGRADE

• PC controlled wireless robot.

• Automatic street light switch.

COURSE RELATED PROJECTS

• Designed a 200 tap filter using CC studio available from Texas Instrument (based on C).

• Designed an 8 bit barrel shifter in P-spice and drawn a layout in MAGIC software for IC

implementation.

• Designed a multiply and add instruction, design a hardware multiplier and add an interface to the

multiply and add instruction. This includes handling of a PCCOMP and KCPSM3.

• Designed adder display, 32 bit adder, flashing LEDs, scoreboard, dice game and successfully

implemented on FPGA demo kit.

TECHINICAL SKILLS

• Flawless handling of Xilinx ISE design suit, mentor-graphics- Modelsim.

• Schematic drawing, Express PCB.

• Ability to draw layout of digital designs for IC using Magic software.

• Experienced with P-spice, ORCAD schematic.

• Expertise in MATLAB, VHDL.

• Software language: C.

ACTIVITIES

• Treasurer - Indian Student Association of Tallahassee (INSAT) Florida (2008-2010).

Contact this candidate