Electrical Engineer Design

Sumarlin William

*** * ******** ** *** *** Los Angeles, CA 90005

515-***-**** abmm90@r.postjobfree.com

EDUCATION

. Master of Science in Electrical Engineering, May 2010, University of

Southern California GPA: 3.55

. Bachelor of Science in Electrical Engineering, December 2007, Iowa

State University GPA: 3.37

PROFESSIONAL EXPERIENCE

Ridgetop Group, Inc, Tucson, AZ / Design Engineer

06/2009- 08/2009

. Responsible for the design and system integration of a 10-bit

Integrating ADC in XFAB high-voltage 1.0 m

. Performed simulation and optimization of a 14-bit 40 MSPS pipelined

ADC in 0.18 m HJTC process technology

. Assisted in the simulation of a femto-ampere current measurement

circuitry using Verilog-AMS Simulator Tool

Ridgetop Group, Inc, Tucson, AZ / Electrical Engineer

03/2008 - 08/2008

. Submitted a proposal with complete assessment on the design of IC

blocks circuitries meeting customer's requirements for ECG

instrumentation

. Tested the first silicon of a 64-pins IC which consists of a VGA and

ADC. Wrote a Matlab routine to fully characterize the specifications

of the tested ADC

. Developed a Labview routine to automate the measurements of other IC

commercialization products and verified the functionality of GUI

application tool using gathered data

Iowa State University, Ames, IA / Research Assistant

05/2007 - 12/2007

. Responsible for setting up and testing novel device for VLSI

microarrays use in chemoreceptive and olfactory sensing applications.

Co-author "A novel floating-gate biosensing device with controlled

charge-modulation", Life Science Systems and Applications Workshop,

2007. LISA 2007. IEEE/NIH, pp. 257 - 260, Nov. 2007

. Designed micro-channel masks for purpose of learning spatial

orientation and maze exploration in C. elegans

. Studied and experimented with the process of fabricating designed

micro-channels on glass slides

ACADEMIC EXPERIENCE

. Designed RF integrated circuits for communication such as LNA, Mixer,

VCO, Quadrature-VCO operating at 2.4GHz and Wideband Transimpedance

Amplifier (DC - 2.5GHz) in 0.25 m CMOS process technology

. Designed Charge-pump PLL that includes Phase-Frequency Detector, VCO

and Frequency-Divider operating at 400MHz in 0.18 m CMOS process

technology

. Designed and Built Receiver Block System (LNA, Oscillator, Down-

conversion Mixer and IF Amplifier) operating at 200MHz using discrete

components and characterized them in Lab

. Designed Two-Stage CMOS Operational Amplifier, 12-bit Resistor Ladder

DAC, Multi-purpose Digitally Controlled Analog Building Block (Digital

potentiometer/Amplifier/DAC) with Post-Layout Simulation in AMI 0.5 m

CMOS

. DDR2 SDRAM Controller design, test and synthesis using Verilog

(Awarded one of the best projects in class of 100 students)

. Designed with layout of 16-Bit Motion Estimator for a DSP which

consists of 2 x 2.048KBit SRAM, Data-pointer, Adder and Subtractor in

TSMC 0.18 m CMOS (Awarded one of the best projects in class 100

students)

. Successfully designed, implemented and tested a portable wireless

barcodes scanner from a wired device to assist sight-constrained

people under a given budget

CAD TOOLS & PROGRAMMING SKILLS

. HSPICE, Cadence, SoC Encounter & BuildGates, Synopsys Design

Analyzer, ADS, NanoSim, ASITIC, MATLAB, LabVIEW, Verilog, Verliog-

AMS, C++, Java

AWARDS

. Dean's List Spring & Fall 2007

. Best Student & Postdoc Paper Awards (IEEE/NIH BISTI Life Sciences

Systems & Applications LISA'07)

. Design Contest Winner in both VLSI System Design Courses at USC,

EE577a and EE577b

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