Sagar Shah
**N **nd Street, **** University Crossings, Philadelphia, PA-19104
(M) 610-***-****
Email: ********@*****.***
CAREER SUMMARY:-
A PhD candidate with experience in fixed point digital signal processors
and assembly language, RTOS fundamentals and exposure to various digital
signal processing applications such as speech coding, audio signal
processing, texture classification, image processing and radar signal
processing, currently looking for a full-time position in the industry.
EDUCATION:-
PhD candidate in Electrical/Telecommunications Engineering,
Current
Drexel University, Philadelphia
Masters in Electrical/Telecommunications Engineering,
Graduated: June 2009 (GPA: 3.73)
Drexel University, Philadelphia
Bachelor in Electronics and Telecommunications Engineering,
Graduated: July 2005 (GPA: 3.77)
Sardar Patel University, India
WORK EXPERIENCES:-
Mitsubishi Electric Research Laboratories, MA (September 2009 - December
2009)
Intern
Project: Low-Complexity Space-Time Adaptive Processing (LC-STAP) for
airborne radars
Developed a novel low-complexity space-time adaptive processing technique
and achieved computational cost savings of ~33% for performing near-optimal
clutter suppression in airborne radars
Wipro Technologies Ltd., India (August 2005 - August 2007)
Project Engineer DSP/Embedded Systems
Consultation activities in Qualcomm India Pvt. Ltd.
Successfully debugged multiple real-time RTOS and firmware code problems
using in-silicon debuggers (ISDB) and cache profiling tools such as ETM
Code porting and optimization activities performed on audio codecs helped
achieve reduction of ~40% in DSP code memory
Cache profiling activities helped understand the cache behaviour better and
resulted in ~8% savings in processor cycles (MIPS) usage
Developed and deployed software tools for cache profiling and successfully
setup an external hardware debugger for QDSP5 processor
Mentored 2 team members on cache structure and fetch latencies and usage of
external debuggers
TEACHING AND RESEARCH EXPERIENCES:-
Drexel University (January 2009 - September 2009)
Research Assistant
Project: Radar Signal Processing using Compressed Sensing
Developed a new method for estimating target ranges with higher resolution
in step-frequency radars by applying the theory of compressive sampling,
and achieved bandwidth savings of ~40%
Drexel University (April 2009 - June 2009)
Teaching Assistant
Course: Transform Methods and filtering
Conducted and graded quizzes, performed recitations/discussions
Drexel University (January 2008 - September 2008)
Research Assistant
Project: Classification of in-vitro fertilized embryos using near-infrared
spectral data
(in collaboration with Molecular Biometrics LLC)
Implemented a system for modelling the spectral data using existing models
and distributions and achieved detection accuracies of ~70% for certain
test cases
PUBLICATIONS:-
"STEP-FREQUENCY RADAR WITH COMPRESSIVE SAMPLING" - Accepted at ICASSP
2010
"TWO-STEP LOW-COMPLEXITY SPACE-TIME ADAPTIVE PROCESSING (STAP)"
- Submitted to
Globecom 2010
RELEVANT PROJECTS:-
Classified textured images using Compressive Sensing
Shape recognition and classification using B-spline interpolation and
moment invariants
Developed and implemented a 3.3 Kbps speech codec using sinusoidal
analysis/synthesis and vector quantization methods
Applied Huffman and Arithmetic coding techniques for images
Developed a speech recognition system using 8051 microcontroller
RELATED COURSEWORK:-
Digital Signal Processing DSP for Sound and
Hearing
Digital Image Processing Parallel Computer
Architecture
Digital Communications Wireless Systems
FUNDAMENTALS:- RTOS, IEEE 802.11, Bluetooth, MPEG
TECHNICAL SKILLS:-
Programming languages/software: MATLAB, C, Assembly
Digital Signal Processors: TMS320C3xx, ADSP-BF533, QDSP5000TM
Processors/ Microcontrollers: x86, 8051
Scripting languages: Tcl
Simulation tools: ADSP-BF533 EZ-Kit LITE, 8051 MIDE,
QDSP5000TM Dbx
Hardware debugging tools: ETM (Embedded Trace Macrocell),
Lauterbach JTAG, ISDB, ICE