Manager Engineer

Dennis F. Ackerman

**** ******* **** ***********@*****.*** Mobile:

Cir 512-***-****

Austin, Texas 78731 http://www.linkedin.com/in/dennisa Home:

ckerman 512-***-****

Summary

Senior engineering manager with success in building and leading domestic

and international teams, initiating new strategies and exceeding business

objectives in the cellular, networking and computer systems industries.

Recognized for the ability to manage complex issues in normal and crisis

situations while inspiring commitment. Enjoys reputation for keen sense of

urgency, ability to see the big picture, identify key issues and

opportunities and establishing processes to advance the business. Awarded

three patents and authored one publication.

CORE COMPETENCIES

Silicon Validation SoC Chip Development Project Management

Lab / Budget Management Third Party Partnerships Customer Partnerships

Software Systems Hardware Systems System Simulation &

Development Development Emulation

PROFESSIONAL Experience

FlexThoughT, Austin, Texas 2009 -

Current

Consulting, Technical Education

Partner, 2009 - current

. Developed and delivered an IC & SoC Post-Silicon Validation Course for

the Asia region

Freescale Semiconductor, Inc., Austin, Texas 1997 - 2009

[Formerly Motorola Semiconductor Products Sector (SPS)]

One of the world's leaders in the design and manufacture of embedded

semiconductors for wireless, networking, automotive, consumer and

industrial markets.

Global Technical Validation Program Manager, CPG IC PMO, 2007 - 2009

Appointed to build and lead the global IC verification and validation

program management office responsible for all of the Cellular Product

Group's Worldwide Design Centers in the US, and India during a dynamic

period of change in the company.

. Led the successful pre-silicon verification and post-silicon validation

of several baseband IC projects including emulation, FPGA and silicon

bring up projects.

Senior Engineering Design Manager, SoC Validation & Emulation Team, 2001 -

2007

Appointed to create, develop and deploy the best strategy and lead all

silicon validation activities across the Networking and Computer Systems

Group Worldwide Design Centers in the US, Israel, India and Australia.

Managed a team of eight managers and 81 engineers. Directly responsible for

$5M Budget.

. Led the successful bring up and delivery of 15 new high-performance

System on a Chip (SoC) designs from pre-silicon emulation through volume

production, meeting or exceeding project commitments.

. Spearheaded and managed the definition, development and deployment of a

world-class SoC validation methodology across the worldwide design

organization resulting in significant reduction in design-to-market time

and enhanced R&D investment efficiency.

. Appointed by Freescale senior management of all business groups to

evaluate and determine the best silicon validation strategy for the

entire corporation.

. Significantly increased Australia and India design centers group's design

delivery capability training global silicon validation and validation

systems development engineering teams.

. Built and leveraged customer and third party emulation and silicon bring

up partnerships with Tektronix, Agilent, Xilinx, Tundra, Windriver

Systems, QNX, Altera, Cisco, Motorola and Ericsson, resulting in

significant time-to-market reduction.

. Drove development of a SoC and system level emulation capability driving

issue discovery much earlier in the design process.

. Successfully executed emulation on nine SoC designs, directly resulted in

saving mask revisions and decreased time-to-market.

Manager / Senior Engineering Design Manager, 1997 - 2001

Appointed to unify and drive all silicon validation efforts for Somerset

PowerPC design center. Managed a team of five managers and 30 engineers.

Direct responsibility for a $2M Budget.

. Drove the successful bring up and delivery of nine new high-performance

processor designs from first silicon to volume production, meeting or

exceeding project commitments.

. Spearheaded the effort to architect, develop and deploy a world-class

processor silicon validation system based on embedded-LinuxPPC, random

test generation, modeling, run-time control software and cycle

reproducible hardware bring up platforms, resulting in significant

reduction in time-to-market delivery of qualified products.

ADDITIONAL EXPERIENCE

Concurrent Computer Corporation, Fort Lauderdale, Florida

Lead Software Engineer, O/S Platforms Development

International Business Machines Corporation (IBM),

Team Leader, Advisory Engineer, Boca Raton, Florida

IBM Microkernel Development

Team Leader, Associate through Advisory Engineer, Poughkeepsie, New York

Logic Verification Systems and Design Tools (CAD)

Education

M.S.C.E., Syracuse University, Syracuse, New York

B.S.E.E. Special Honors, University of Colorado, Boulder, Colorado

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