Engineer Quality Assurance

NGUYEN TRAN

**** ****** ****** ** 408-***-****

San Jose, CA 95132 **************@*****.***

Summary of Qualifications:

. Over 10 years experience in the development of versatile fully-

automated test platform software codes based on visual basics (VBA),

Perl, TCL/TK and Shell scripting languages.

. Experienced in testing and characterization in semiconductor and

network devices including NIC cards, HBAs, switches...

. Excellent problem solving skills with comprehensive understanding of

signal-integrity analysis and high speed PCB troubleshooting

techniques.

. Expertise in Instrumentation. Fully conversant with programming of

High-speed Test equipment like Tektronix Digital Serial Analyzer,

Agilent DCAJ, BERT scope ...

. Familiar with Physical layer protocols(Ethernet 802.3xx, SONET, CPRI,

ANSI) and High-speed Physical layer verification

. Understanding routing protocols (WAN/LAN, TCP/IP, OSPF, RIP, BGP

. Highly motivated Individual willing to go the extra mile to get the

job done

Work History:

SEMTECH, IRVINE, CA 06/2009 - Present

Sr. Design Verification Engineer

. Written test programs for verification, characterization, and final

test of new products.

. Fully tested and verified the following high-performance IC building

blocks: 40/100 MUX, 100/40 DEMUX, VCOs, PLL, and CDR to 113Gbps.

. Created VBA scripts that reduced test time and help to speed up the

process of bring up new SERDES chips by automating system through

GPIB, Serial Port.

NVIDIA, Santa Clara, CA 10/2009 - 06/2010

Test and Design Verification Engineer

. Qualification and signal integrity measurement may include desktop PC

motherboards, notebook motherboards, graphics cards, embedded system

products, multimedia systems, and more.

. Created VBA scripts that reduced test time and help to speed up the

process of bring up new GPU chips by automating system through GPIB,

Serial Port and generates final report.

National Semiconductor, Santa Clara, CA 08/2000 - 5/2009

Senior Test Verification Engineer

. Written versatile fully-automated test platform software codes based

on the visual basic (VBA) integrated into Excel and Microsoft Word,

TCL/TK and Shell script (Linux OS) which automatically controls the

DUT through SMBUS, I2C, and MDIO and test equipments through GP-IB,

and generates evaluation reports.

. Expanded DVT test coverage while reducing test time of complex Multi-

Gigabit SERDES and signal conditioning links.

. Developed an interface for Perl scripts to call TCL libraries for IXIA

and Spirent. Seeing the benefits of this tool, QA team decided to use

this for automation.

. Routinely customized and reconfigured platforms to support product

lines with various standards and custom specifications such as PCI-E,

ANSI, Ethernet, 802.3, SDI, HDMI.

. Fully verified the following high-performance IC building blocks:

Physical layer Transmitters and Receivers, Active & Passive

Equalizers, De-Emphasis/Pre-Emphasis Drivers, MUX Buffers, SERDES,

VCOs, PLL, CDR, and clock distributors up to 12Gbps.

. Worked closely with test and measurement vendors to select appropriate

up-to-date equipments, cables, and accessories.

. Handled different products including 10/100/1000 Base-T, Switches,

Info-entertainment SERDES with back-channel signaling for automotive

applications.

. Performed different levels of testing like Interoperability,

conformance, stress test for layer 2 switches.

. Worked with cross-functional teams within the organization in order to

define & streamline new processes through innovations to increase the

efficiency and reduce time to market.

. Generated and executed first silicon evaluation & verification plans.

. Developed & executed bench and Design Verification Test plan with

design and application engineers in order to guarantee the performance

of the product as per datasheet.

3Com Corporation, Santa Clara CA 10/1995 to 08/2000

Hardware Design Verification / System Test Engineer

. Verified all new products to meet IEEE 802.x and ANSI standards

including 10Base-T, Fast Ethernet, FDDI, ATM, Token Ring, 100Base-T,

SAN, Layer 2 Switches, Fibre Channel Host Bus Adapters (HBAs

. Developed measurement methodologies, algorithms and test procedures

for advanced network products.

. Programmed and ran environment test chamber, building regression test

bed.

. Worked closely with the design engineering teams for verification of

PCBs and components.

. Investigated and debugged process issues through appropriate

measurements.

. Reviewed product functional spec, developed white-box test plan, wrote

test cases, and executed tests (manual and auto).

CHIPCOM (David Systems, Inc), Sunnyvale, CA 06/1991 to 10/1995

Product Engineer

. Performed components qualification and failure analysis. Supported

manufacturing and engineer groups. Written test procedures and trained

manufacturing technicians in testing and troubleshooting new.

. Modification and analysis of all new products such as Token Ring,

10Base-T, 100Base-T, Stackable Hubs, BNC, FOIRL

. Documentation of new test processes performed EMI testing of new

products.

. Worked closely with the test and design teams to qualify new products

and make the recommendation for improving test methodologies.

Technical Skills

Computer Languages: C, Visual Basic, LabView, TCL/TK, Perl, Python.

Lab Equipment: Real time & sampling oscilloscopes with jitter decomposition

to include DSA 7160A Digital Serial Analyzer, Agilent DCAJ 86100C, Bert

Scope 12500B, Parallel Bert E8403A VXI, Vector Network Analyzer N4419A,

E8362B for S-Parameters, TDS 7704B, Serial Spectrum analyzer E4440A, Logic

analyzer TLA714, Agilent 70843C Error Performance Analyzer, Ixia, Spirent,

Tektronix MB100ECL/TTL...

Education:

BS in Electrical Engineering at Fresno State University; Fresno, CA 1986 -

1990

Keywords:

Bachelors, EE, design verification engineer, test engineer, test automation

engineer, Bay Area, Mountain View, Silicon Valley, Open Shortest Path

First, Routing Information Protocol, Border Gateway Protocol, SATA, Video,

PCI Express, Transmission Control Protocol with Internet Protocol,

Scattering Parameters, Storage Area Network, Switches, PLL, CDR, VCO,

Physical layer, Product Engineer, Equalizer, Analog, High speed, HBAs,

SERDES, Ethernet, Instrumentation, testing, product, quality assurance,

MDIO, I2C, SPI, 40/100 Gbps MUX, 100/40 Gbps DEMUX, EMI/EMC compliance.

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