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Engineer Project

Location:
Austin, TX, 78747
Posted:
September 08, 2010

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Resume:

Armando J. Garcia

**** ******** **** ****

Austin, TX 78747

Phone: 512-***-****

Email address: **.*********@*****.***

Objective:

To find a challenging position as a Verification/Validation Engineer

in the X86/microprocessor industry.

Education:

BS in Electrical Engineering with concentration in Electronics and

Control Systems

University of Puerto Rico, Mayaguez Campus

Graduated on May 1995

Overall GPA: 3.73 (on a 4.0 scale)

Experience:

July 2009 - Present : Advanced Micro Devices, Austin, TX

SOC Verification Lead for Orochi Server Processor

- This is AMDs first processor with a multi-threaded core

- Managed resources across US and India

- Directly responsible for ATE determinism effort

- Wrote AMDs first thread based assembly test generator in Perl

December 2007 - June 2009 : Advanced Micro Devices, Austin, TX

Full Chip Debug Lead for Istanbul Server Processor

- Led a 12 man team (8 Austin, 4 Romania) that debugged Full Chip fails

- Provided all Project Full Chip Metrics to Project Management

- Created a new X86 Test Generator

- Assisted ATE determinism verification

- Assisted in debugging silicon fails at ATE

June 2007 - December 2007 : Intel, Austin, TX

- Verification Engineer for Chiefton Server Processor

- Ported Specman ROB Emulator to System Verilog

Feb 2007 - June 2007 : Advanced Micro Devices, Austin, TX

- Member of Technical Staff (8 direct reports)

July 2000 - Jan 2007 : Advanced Micro Devices, Austin, TX

- Working for K7/K8/K9/GH verification team as a Member of the Technical

Staff.

- North Bridge Lead for directed test effort for GH (Barcelona) Quad

Core Processor

- Wrote test plans and numerous directed tests in X86 assembly

for different features and blocks of the processor. (Exceptions,

MCA, Perf. Mon., SSE, SSE2, X87, North Bridge, RAS, APIC,

Ucode, Hypertransport, SBI)

- Reviewed all major testplans for North Bride Full Chip effort

- Analyzed coverage reports and wrote test for coverage holes.

- Wrote scripts (Sed, Awk, Csh, Perl) to automate tasks and test

writing.

- Ran regressions, debugged and fixed regression fails.

- Wrote directed tests to target timing reports of possible

silicon speedpaths.

- Mentor for new employees

October 1999/ July 2000 : Motorola - MCORE Technology Center, Austin, TX

- Worked as a Verification Engineer functionally verifying the M341

Cache Unit (Unit/System Levels).

- In charge of Unit Level testing/testbench and regressions for the

M341 Cache Unit.

- Wrote Unit and System Level testcases for the M341.

- Ran in-house RTPG tool set at system level and debugged failing

testcases.

- Ported existing Test Suite into M341 project.

August 1997 - October 1999: National Semiconductor/ Cyrix, Richardson, TX

- Worked as a Design Verification Engineer functionally verifying the

MXi/Jedi core.

- Wrote numerous directed and production tests in assembly to target

different areas of the core.

- Ran test regressions on the Verilog models and debugged failing

tests using in-house tools and Signalscan.

- Ran random test generator to verify proper functionality of the FPU.

Targeted MMX instructions.

- Updated existing scripts to serve project needs. (C, Perl, C Shell)

- Isolated problematic code from commercial software applications that

failed on the actual silicon and then proceeded to create tests that

recreated the failure on the rtl model.

- Generated Test Vector Patterns to be used at tester.

August 1996/August 1997: Motorola of Puerto Rico, Road 686 KM 17.0,

PO Box 1065, Vega Baja, PR 00694

- Provided technical support to pager manufacturing lines as a Test

Engineer.

- Modified system tests in order to improve the lines' speed and

quality performance.

- In charge of front-end testing area of Horizon pager. Supervised

technicians and test station operators.

July 1995/August 1996: Honeywell Space Systems Division, 13350 US Hwy

19N, Clearwater, FL 34624-7290

- Simulated VHDL designs using Vantages' Optium Software. Created

macro files to test VHDL code and then proceeded to verify design.

- Used several Mentor Graphics' tools to create/update schematics.

- Wrote several scripts for the Mentor Graphics' tools to automate

tasks.

References:

Available upon request



Contact this candidate