Engineer Project
Resume:
SATYA VIVEK KANAKADANDILA
****, **** ** able7w@r.postjobfree.com
Pleasanton, CA-94588 806-***-****
SUMMARY
• Proficient in writing code in Verilog
• Worked for 2 years at LED Technologies as verification Engineer
• Implemented vending machine and RISC CPU in XILINX and Modelsim using Verilog
• Developed Digital Clock and Alarm Clock using Verilog
• Performed testing of a counter IC and verified the proper functioning of the IC in all areas
• Generated filter coefficients using MATLAB and implemented them in real time DSK 6713 board
• Passed FE Exam and achieved EIT Certification from Texas Board of Professional Engineers in 2009
EDUCATION
Masters in Electrical and Computer Engineering Aug 2008 – Aug 2010
Edward E. Whitacre Jr. College of Engineering, Texas Tech University, Lubbock TX GPA – 3.6
Bachelors in Electronics & Communication Engineering Aug 2004 May 2008
Jawaharlal Nehru Technological University, Hyderabad, India GPA – 3.9
TECHNICAL SKILLS
Languages: C, Verilog, VHDL, HTML
Tools: XILINX, Modelsim, Cadence, MATLAB, ANSYS, CCStudio, AutoCAD, VisualStudios.NET,
MS Office, Perl
Operating Systems: Unix, Windows 7, Vista, XP, 98, and MS-DOS
WORK EXPERIENCE
• Graduate Assistant Summer 2009 – Aug 2010
Electrical and `Computer Engineering Department, Texas Tech University, Lubbock Texas
Assisted students handling different tools like Xilinx, Modelsim, Matlab, AutoCAD and Cadence
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providing me with a good expertise in using these tools
Identified the defective equipment like FPGA Boards(Basys), Power Supplies and others, and find
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solutions to fix them
Installed and configured new hardware and software
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Was part of the team that designed the software for checking-in and checking out the equipment, using
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.NET
• Section Designer of Blackboard May 2009 – August 2009
Electrical and Computer Engineering Department, Texas Tech University, Lubbock Texas
Designed the templates in blackboard for all the courses in the department of Electrical and Computer
o
Engineering
Updated the department course managing website
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Maintained the backup for all the course material present in the Electrical and Computer Engineering
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Department
• Verification Engineer May 2006 – July 2008
AMAR Manufacturing Enterprises, Hyderabad, Andhra Pradesh, India
Worked to set up verification environment, generate test plan, and write test cases to verify complex
o
designs
Developed testbenches, using verilog and implemented them in Xilinx and Modelsim and made sure that
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the verilog code for the hardware is written properly
Worked closely with design engineers, micro-architects, other team members to ensure high quality if
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testplans, functional coverage and tests
o Reviewed test procedures generated by other verification engineers
ACADEMIC PROJECTS
• Implementation of Vending Machine Using Verilog Fall 2009
o The main aim of the project was to implement a snack vending machine
o For this purpose the code was written using Verilog in XILINX. The simulations were performed in Modelsim
• Implementation of 32-bit Pipelined-RISC CPU Using Verilog Fall 2009
o Worked independently and implemented a CPU consisting of reduced instruction sets that are divided into
different stages
o This was implemented in XILINX and Modelsim using Verilog as the hardware description language
o The code was written in eight different modules. Test-bench is written for each module and ensured the proper
working of each module
• Implementation of a 3 band equalizer on a DSK 6713 board using CC Studio and MATLAB Spring 2009
o The aim of the project was to filter an audio signal into different bands of frequencies
o The filter coefficients were generated using FDA Tool in signal processing Toolbox of MATLAB
o The LEDs on the DSK board were made to glow according to the intensity of the output signal and
controlling of each band was done with DIP switches present on the board
• Design of two stage op-am in Cadence
Spring 2009
Designed schematic for a two stage operation amplifier, which has differential input and single ended
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output and verified in Pspice
Obtained the target gain, power consumption, voltage swing, gain and phase margins
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• Testing of a counter IC using VLCT Fall 2008
As a member of a team, tested the proper functioning of a counter IC by performing Continuity,
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Functional, Propagation Delay and Transition Time test procedures using VLCT
o Results were verified using the values obtained by bench testing
• MEMS Quick Return Mechanism using AutoCAD Fall 2008
o Designed the regular Quick Return Mechanism in Micro Electro Mechanical System
o The design and simulations of the Quick Return Mechanism were performed in AutoCAD
• Project on Recipe Management System using .NET January 2008
Developed web pages on the concept of managing different recipes in a precise manner
The web pages were developed using Visual Studios.NET
o The database for this project was designed using MS SQL
• A Research on USB working & its different interfaces Spring 2010
o Worked independently and did a research on USB design, working, transfer of data in USB and its different
interfaces
Submitted a project on tracing of a USB device using an USB sniffing software, USBlyzer
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SELF INITIATED PROJECT
• Developed a Digital Clock using Verilog Summer 2010
o Initially, the aim of the project was to write code for the Digital Clock using Verilog
o The code written for digital clock and is extended by including the code of alarm clock
The results were verified using test-bench program by running on Xilinx and Modelsim
RELEVANT COURSE WORK
Nanophotonics, Fiber Optics, Individual Study on USBs, Testing of Digital Systems, Introduction to Micro systems,
Modern Optics, Embedded Systems, Digital Signal Processing, Analog IC Design, Micro-Processor Architecture, Solid
State Physics and Engineering Analysis
Contact this candidate