Engineer Power

John G. Bai

**** ** ****** ***** **** 425-***-**** (mobile)

Vancouver, WA 98665 abl2tv@r.postjobfree.com

QUALIFICATION

Highly-motivated and result-driven personal with great enthusiasm to develop and utilize state-of-the-art

technologies for marvelous applications

Technical expertise / interests include following:

(Opto-) Electronics System Design/Analysis (Opto-) Electronic Packaging

Finite Element Modeling Reliability Analysis

Mechanical Design Product Manufacturing

Semiconductor Processing Thin Film Technology

Lean/Six Sigma (Black Belt Certificated) Continuous Improvement

• Computer programs: MS Windows, MS Office, Visio, Axapta, JMP, MiniTab, and Origin, etc.

• CAD / design packages: SolidWorks (5y), COSMOS (5y), AutoCAD (5y), ANSYS / Multiphysics (5y), I-

deas (3y), MathCAD (9y), and Mathematica (7y), etc.

AWARDS AND HONORS

• Ph.D. dissertation work was recognized as Paul E. Torgersen Research Excellence Award, Virginia Tech,

Blacksburg, VA, March 2006

• Special Thanks in HiTEC Conference, Santa Fe, NM, May 2006

• Featured Publications in journal of Nanotechnology, March 2007

• R&D 100 Award, October 2007

This award recognizes 100 Most Technically Significant New Products / Process of the year around the world

• IEEE Senior Membership promotion, December 2007

• Approved U.S. Permanent Residency by USCIS via category of Alien of Extraordinary Ability (EB1-A),

2008

• Senior Engineer promotion, nLIGHT Photonics Corporation, March 2009

This promotion recognizes my leadership in technical projects and contributions in research proposals

CERTIFICATES

• Train the Trainer Certification for customized training, Clark College, Vancouver, WA, January 2009

• Six Sigma Green Belt Certification, American Society for Quality, June 2009

• Six Sigma Black Belt Certification, ETI Group, July 2009

This certification recognizes successful accomplishment of a 128-hour SSBB training course and two six-sigma projects

• Six Sigma Black Belt Certification, American Society for Quality, October 2009

• Certificated Engineer-in-Training (EIT) for Mechanical Engineer, NCEES-Washington State, October 2009

WORK EXPERIENCE

Product Development Engineer / Senior Product Development Engineer, October 2007 – present

nLIGHT Photonics Corporation, Vancouver, Washington

• Design and process next generation semiconductor laser diodes and optical packages for engineering NPI

Design single-emitter laser diodes with both higher optical power and higher beam quality (brightness)

Design next generation laser packages with higher performance and higher manufacturability using CPU ceramic

submounts, BeO submounts, and IMS substrates

Design new T0 and burn-in test fixtures for NPI

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• Support general semiconductor die bonding product line and troubleshoot the existing problems

Design and qualify CTE-matched and highly thermal conductive submounts for die bonding

Optimize the solder reflow and die bonding process via DOE and SPC

Use optical/ SEM microscopes, Sonoscan, X-ray, FIB, Auger, profilometer, Veeco and CAD analysis to troubleshoot

problems existed in both front end and back end semiconductor processes

• Process and improve RMA of opto-mechanical systems and optic fibers

Conduct research on failure mechanisms of opto-mechanical systems and fiber lasers and generate RMA reports

Work on RMA rate enhancement

• Led two six-sigma projects on processing and testing yield improvement of semiconductor laser diodes

Linked testing failures with initial thin-film processing defects in semiconductor laser diodes for better defect inspection

and screen criterions, total saving $150k/year

Added critical steps to screen out initial processing defects in optically critical zones and total saving $64k/year

• Simulated high power laser packages for enhanced thermal management

Generated a complete data list of thermal resistance for all the nLight’s high power products

Served as thermal and structural analysis agent for high power optoelectronic packages

• Resolved the initial burn-in rack overheating problems

Provided two comments during OCAPs: 1) perpendicular press for more uniform thermal contacts and 2) TIM material

• Designed opto-mechanical systems for laser diode far-field measurements

Enhanced far-field testing set up by better optical alignment, SMCD, and more reliable data acquisition

• Brought up on-line a dry glove box for optical module assembly

Prepared dry box for sealing dry air with oxygen during optical package liding and helium for indication

• Involved in grant proposal writing to bring-in government money

Research Associate, June 2006 – September 2007

Department of Mechanical Engineering

University of Washington, Seattle, Washington

• Developed patent-pending shadow edge lithography for nanoscale patterning and manufacturing

Developed a uniform, silicon-wafer scale and high-throughput nanomanufacturing method using conventional

microelectronic semiconductor processing technologies

Manufactured nanoscale structures such as nanowires, nanochannels, nanodots, and nanowells on 4-inch or larger silicon

wafers by parallel thin-film deposition and photolithography steps

Research Assistant / R&D Scientist, July 2000 – May 2006

Center for Power Electronics Systems / Center for High Performance Manufacturing

Virginia Tech, Blacksburg, Virginia

• Developed an award-winning high-temperature device interconnection method (Ph.D. dissertation work)

®

Prepared nanosilver paste which was commercialized as NanoTach by NBE Technologies., LLC in 2005

Processed and characterized low-temperature sintered nanosilver for high temperature packaging applications

• Developed patent-pending inkjet printing technique for high-performance rapid manufacturing

Developed ink-jet printable and low-temperature sinterable nanosilver suspension as a high-performance binder for rapid

manufacturing applications

• Led reliability evaluations of three die-bond technology of wire-bond, solder-bump and area-solder

Prepared three types of commonly used power packages in chip-scale level, totally up to ~600pc

Used thermal cycling experiment to evaluate their cycling reliability of the interconnections

Used FEA to simulated operational conditions and power cycling reliability

• Designed and fabricated flip-chip on flex integrated power electronics modules (IPEMs)

Started from bare semiconductor power devices, using the sputtering thin-film deposition and photolithography and

etching methods to form under bump metallization for ball grid array (BGA) of the flip-chip interconnection

• Developed magneto-optic current sensing systems for power electronics applications

Developed a compact, low-noise, low cost, and fiber-less magneto-optic current sensor for applications in integrated

power electronics modules

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• Maintained cleanroom equipments such as RIE, sputter and e-beam thin-film deposition machines

Responsibility included detailed process documentation, training new Micron center members, BoM preparation, changing

utility, and trouble-shooting existing problem in the Micron cleanroom

• Collaborated with General Electric Company on developing GE power overlay (POL) packaging

technology

Used sputtering and electroplating thin film deposition methods for GE POL development

Research Assistant, August 1998 – June 2000

Thayer School of Engineering

Dartmouth College, Hanover, New Hampshire

• Studied electrical properties of II-VI semiconductors (ZnS and ZnSe) using scanning probe microscopy

• Maintained scanning probe microscopy equipment

Research Assistant, September 1995 – July 1998

Peking University, Beijing, China

• Developed silicon-based light-emitting devices (LEDs) via thin-film deposition technology

• Collaborated with 13th Institute of Ministry of Electronics Technology to study light-emitting mechanism

• Characterized LEDs for signal / display applications

INVENTION

• With G. Q. Lu, et. al., “Nanoscale metal paste for interconnect and method of use .” VTIP disclosure # 03-

142, Global patent pending.

• With K. D. Creehan and H. A. Kuhn, “Ink-jet printed low-temperature sinterable nanometal suspensions

as a binding solution in rapid prototyping.” VTIP disclosure # 06-040, U.S. patent pending

• With G. Q. Lu, et. al. “A nano-metal composite made by electrostatic deposition from colloidal

suspensions as an electrical and thermal interface material for electronic products .” VTIP disclosure # 03-

170

• With J. Chung, “Shadow edge lithography for nanoscale patterning and manufacturing .” UW Tech

Transfer Reference No. 7623D, Global patent pending

• With J. N. Calata, G. Q. Lu, and P. G. Duncan, “A compact, low-noise, low cost, and fiber-less magneto-

optic current sensor for applications in integrated power electronics modules .” VTIP disclosure # 04-110

• With J. Chung, et. al, “Bio/chemical sensor in open nanochannels.” UW Tech Transfer Reference No.

7714D

EDUCATION

• Ph.D., Department of Materials Science and Engineering 2005

Virginia Polytechnic Institute and State University, Blacksburg, VA

Concentration: Electronics Materials/Packaging

• M.S., Thayer School of Engineering 2000

Dartmouth College, Hanover, NH

Concentration: Engineering Science

• M.S., Department of Physics 1998

Peking University, Beijing, China

Concentration: Semiconductor Process and Device

• B.S., Department of Applied Physics 1995

Tianjin University, Tianjin, China

PUBLICATIONS

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• J. G. Bai, W. H. Yeo, and J. H. Chung, “Nanostructured biosensing platform shadow edge lithography for

high-throughput nanofabrication,” Lab on a Chip, vol. 9, no. 3, pp. 449-455, 2009

• Y. Liu, K. Oh, J. G. Bai, C. L. Chang, W. Yeo, J. H. Chung, K. H. Lee, and W. K. Liu, “Manipulation of

nanoparticles and biomolecules by electric field and surface tension,” Computer Methods in Applied

Mechanics and Engineering, vol. 197, pp. 2156-2172, 2008

• J. G. Bai, T. G. Lei, J. N. Calata, and G. Q. Lu, “Control of nanosilver sintering attained through organic

binder burnout kinetics,” Journal of Materials Research, vol. 22, no. 14, pp. 3494-3500, 2007

• J. G. Bai, J. N. Calata, and G. Q. Lu, “Processing and characterization of nanoscale silver pastes for

attaching SiC devices,” IEEE Transactions on Electronics Packaging Manufacturing, vol. 30, no. 4, pp. 241-

245, 2007

• J. G. Bai, C. L. Chang, J. H. Chung, and K. H. Lee, “Shadow edge lithography for nanoscale patterning

and manufacturing,” Nanotechnology, vol. 18, article no. 405307, 2007

• J. G. Bai, J. Yin, Z. Zhang, G. Q. Lu, and J. D. van Wyk, “High-temperature operation of SiC power

devices by low-temperature sintered silver die-attachment,” IEEE Transactions on Advanced Packaging, vol.

30, no. 3, pp. 506-510, 2007

• J. G. Bai, K. D. Creehan, and H. A. Kuhn, “Inkjet printable nanosilver suspensions for enhanced sintering

quality in rapid manufacturing,” Nanotechnology, vol. 18, article no. 185701, 2007. (Featured article in the

journal)

• J. G. Bai and G. Q. Lu, “Thermomechanical reliability of low-temperature sintered silver die-attached SiC

power device assembly,” IEEE Transactions on Device and Materials Reliability, vol. 6, no. 3, pp. 436-441,

2006

• J. G. Bai, J. N. Calata, and G. Q. Lu, “Discussion on the reliability issues of solder-bump and direct-solder

bonded power device packages having double-sided cooling capability,” ASME Journal of Electronic

Packaging, vol. 128, no. 3, pp. 208-214, 2006

• J. G. Bai, Z. Zhang, J. N. Calata, and G. Q. Lu, “Low-temperature sintered nanoscale silver as a novel

semiconductor device-metallized substrate interconnect material,” IEEE Transactions on Components and

Packaging Technologies, vol. 29, no. 3, pp. 589-593, 2006

• J. G. Bai, Z. Zhang, G. Q. Lu, and D. P. H. Hasselman, “Measurement of solder/copper interfacial thermal

resistance by the flash technique,” International Journal of Thermophysics, vol. 26, no. 5, pp.1607-1615, 2005

• J. N. Calata, J. G. Bai, X. Liu, S. Wen, and G. Q. Lu, “Three-dimensional packaging for power

semiconductor devices and modules,” IEEE Transactions on Advanced Packaging, vol. 28, no.3, pp. 404-412,

2005. (Invited paper)

• S. X. Dong, J. G. Bai, J. Y. Zhai, J. F. Li, G. Q. Lu, D. Viehland, S. J. Zhang, and T. R. Shrout,

“Circumferential-mode, quasi-ring-type, magnetoelectric laminate composite a highly sensitive electric

current and/or vortex magnetic field sensor,” Applied Physics Letters, vol. 86, no. 18, article no. 182506, 2005

• G. Q. Lu, X. Liu, S. Wen, J. Calata, and J. G. Bai, “Strategies for improving reliability of solder joints on

power semiconductor devices,” Soldering & Surface Mount Technology, vol. 16, no. 2, pp. 27-40, 2004

• J. G. Bai, G. Q. Lu, and X. Liu, “Flip-chip on flex integrated power electronics modules for high-density

power integration,” IEEE Transactions on Advanced Packaging, vol. 26, no. 1, pp. 54-59, 2003

• J. G. Bai, G. Q. Lu, and T. Lin, “Magneto-optical current sensing in integrated power electronics modules,”

Sensors and Actuators A: Physical, vol. 109, no. 1-2, pp. 9-16, 2003

• G. F. Bai, V. F. Petrenko, and I. Baker, “On the electrical properties of dislocations in ZnS using electric

force microscopy,” Journal of Scanning Microscopy, vol. 23, no. 3, pp. 160-164, 2001

• G. G. Qin, C. L. Heng, G. F. Bai, K. Wu, C. Y. Li, Z. C. Ma, W. H. Zong, and L. P. You,

“Electroluminescence from Au/(nanoscale Ge/nanoscale SiO 2) superlattices/p-Si,” Applied Physics Letters,

vol. 75, no. 23, pp. 3629-3631, 1999

• G. G. Qin, G. F. Bai, A. P. Li, S. Y. Ma, Y. K. Sun, Z. C. Ma, and W. H. Zong, “A comparative study of

electroluminescence from nanosized Si particles embedded silicon oxide films and that from nanosized Ge

particles embedded silicon oxide films,” Thin Solid Films, vol. 338, no. 1-2, pp. 131-135, 1999

• G. F. Bai, Y. Q. Wang, Z. C. Ma, W. H. Zong and G. G. Qin, “Electroluminescence from Au/native silicon

oxide layer/p+-Si and Au/native silicon oxide layer/n+-Si structures under reverse biases,” Journal of Physics:

Condensed Matter, vol. 10, no. 44, pp. L717-L721, 1998

John G. Bai, Page 4 of 4

• G. F. Bai, Y. P. Qiao, Z. C. Ma, W. H. Zong, and G. G. Qin, “Electroluminescence from Si/Si oxynitride

superlattices,” Applied Physics Letters, vol. 72, no. 26, pp. 3408-3410, 1998

• A. P. Li, G. F. Bai, K. M. Chen, Y. X. Zhang, Z. C. Ma, W. H. Zong, and G. G. Qin, “Electroluminescence

from Au/extra thin Si-rich SiO2 film/n+-Si under reverse biases and its mechanism,” Thin Solid Films, vol. 325,

no. 1-2, pp. 137-139, 1998

• G. G. Qin, A. P. Li, G. F. Bai, L. D. Zhang, Z. C. Ma, W. H. Zong, X. Wang, and X. W. Hu, “Effect of

chemical composition of silicon oxynitride on electroluminescence from semitransparent Au/extra thin Si

oxynitride film/p-Si structures,” Physics of Low-Dimensional Structures, vol. 1/2, pp. 179-186, 1998

• G. F. Bai, A. P. Li, S. Y. Ma, Y. X. Zhang, Y. K. Sun, G. G. Qin, Z. C. Ma, and W. H. Zong,

“Electroluminescence from Au/extra thin nanosized Ge particles embedded silicon oxide film/p-Si and

Au/extra thin nanosized Si particles embedded silicon oxide film/p-Si,” Physics of Low-Dimensional

Structures, vol. 1/2, pp. 127-132, 1998

• H. Y. Xie, J. G. Bai, Z. F. An, G. F. Xin, and G. Y. Chen, “High power GaAlAs/GaAs laser diode arrays and

their thermal management,” 9th Intersociety Conference on Thermal and Thermomechanical Phenomena in

Electronic Systems (ITherm), vol. 2, pp. 501-506, Las Vegas, NV, June 1-4, 2004

• J. G. Bai, G. Q. Lu, J. N. Calata, and T. Lin, “Potential application of magneto-optical current sensing in

power modules,” CPES Power Electronics Seminar, pp. 468-474, Blacksburg, VA, April 27-29, 2003

REFERENCE

• Will provide upon request

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