Engineer Quality

Gabriel "Gabby" Remulla

*** ******* ****** - ********, ** 95035

Home 408-***-**** Cell 508-***-****

Email: ********@*****.***

Profile

Engineer with extensive experience in the Semiconductor IC assembly/test

industry. In-depth knowledge of assembly process flows of various package

configurations including leadframe and laminate type packages, packaging

materials, assembly/PCB design rules and wafer fab technologies.

Accomplished professional skilled in quality engineering, process and

product engineering, package development and qualification, equipment

maintenance, quality/reliability engineering. Comprehensive training and

hands-on Statistical Process Control (SPC) concepts and design of

experiments, FMEA, 5-S, Lean Manufacturing, 8-D Problem Solving, Mistake

Proofing, Measurement System Analysis, 6-Sigma. Good background of

various industry standards including Jedec, EIAJ, Mil 883, 38510, TS-16949,

ISO-9000, QS-9000, AEC Q-100, IPC, EU Standard for ROHS/WEEE/REACH.

Excellent computer skills including in Excel, Powerpoint, Word, Acrobat,

Autocad, Lotus Notes, MS Outlook, MS Project, Gerber and training of JMP

software. Strong communication, project management skills. ASQ Certified

Quality Engineer and Certified Reliability Engineer. Extensive experience

with process control and system audits of local and off-shore material

suppliers, assembly subcons, SMT houses using commercial and automotive

standards. Experience in hands-on prototype assembly environment handling

SMT, wirebonder, mold equipment.

Professional Experience

ANADIGICS, Warren, NJ 2006 - 2009

Sr. Package Development Engineer

. Responsible for executing NPI (New Product Introduction) for the wireless

and broadband business units. Drove supplier materials technology and

subcontractor packaging requirements for RF modules, integrated tuners

for cable TV, power amps, line amps using QFN, SIP laminate-based

packages, flipchip, power SOICs, using both GaAs and CMOS die

technologies. Managed new package/assembly process technology

introduction, implementation, and sustaining with off-shore subcons.

Developed packaging technology for recommendation to business segments,

failure analysis techniques, supplier development process and training,

establishing package roadmaps and implementing cost reduction programs.

. Conducted Design of Experiments to qualify new materials such die attach

epoxy, mold compound, underfill, laminate material and establish a Bill

of Materials for each supplier and drove improvement programs with Wafer

Fab teams.

. Responsible for review and approval of laminate (PCB) and flex tape

CAD designs, bond diagrams, assembly process flows, design rules for new

product introductions, Process Change Notices and supplier First Article

Inspection, Failure Analysis, reviewing SCARs from Anadigics subcons and

material suppliers, as well external customers like Samsung, HTC, LG,

handling MRB for non-conforming materials, issuance of datasheets and

application notes for marketing department.

. Led crossfunctional teams consisting of QA, Purchasing, Product and

Test Engineering, Assembly engineering for the evaluating and

qualification of assembly subcontractors and material suppliers

conducting both Process Control audits and Quality System audits,

implementing a score card system, completing qual lot testing then

administering process yield, quality metrics and reliability data

monitoring and trending, as well as driving 8D activities and continuous

improvement programs involving die attach, molding, wirebond, SMT

processes.

. Responsible for qualification of new module products featuring new

SIP laminate and packaging technologies like fine laminate, package-in-

package, incorporation of diplexers, filters, switches inside the module,

flipchip focusing on rel tests such as MSL, HAST, PCT, T/C. Work also

included experimentation to qualify new fab process technologies to

address BHAST failures.. Ran the SMT pick and place, reflow machines

for in-house assembly line.

BOSE Corporation, Framingham, MA 2004 - 2005

Sr. Supplier Quality Engineer

. Responsible for reviewing and qualifying suppliers of electronic

commodities using PPAP (Production Part Approval Process) and evaluating

supplier's quality and reliability data and programs serving as supplier

quality project leader.

. Worked with design engineering in establishing Design Validation and

Process Validation testing requirements and monitoring. Conducted

process control audits of contract manufacturing houses and design

centers in US, Europe and Asia in support of the Automotive System

division special projects and review of APQP.

. Managed reporting and review/closure of 8D's on field failures from the

Home Entertainment, Noise Reduction Technology as well as Automotive

System Division. Audited supplier's production line as necessary to

correct process, quality and reliability issues utilizing DOE and SPC

tools.

STATSChipPAC, Inc. Southborough, MA 2001-2004

Technical Program Manager

. Managed all technical-related programs between factory and customers

including new substrate designs, thermal/electrical simulations, new

package development and device qualifications which led to $10M a year

increase in revenue.

. Played key roles in the resolution of customer quality complaints or

Supplier Corrective Action Requests (SCARs), Failure Analysis and setting

up, implementation of preventive measures which helped reduce SCARs by

50%. Coordinated yield improvement projects and quarterly reliability

monitoring, board-level testing, monitoring and SPC programs.

. Took charge of qualification of green and lead free materials, high

density leadframe, ultra-fine pitch bonding, special wafer materials,

new substrate/leadframe supplier as well as wirebond yield improvements

and process flow enhancements in coordination with Production/Materials

Planning, Quality/Reliability, Process Engineering and Package Dev.

. Managed new substrate and package technology development and

qualifications like build-up EBGA, SIP-PBGA with stack die, FlipchipPBGA,

Exposed pad LQFP with stack die from development to full qualification

then full production which led to at least 15 new customer design wins in

Canada and Northeast US in single year. Part of team developing and

qualifiying WLP, WCSP.

Advanced Interconnect Technologies, Inc., Pleasanton, CA 1992-

2001

Technical Account Manager

. Played leading role in addressing all technical issues liaising

between factory and customer fab or foundries, PCB assemblers,

coordinated failure analysis and RMAs

. Drove new process/equipment/materials development, process yield and

proces flow optimization, Pb-free conversions, wirebond development

programs.

. Developed specs for new material and device qualifications and

reliability monitoring.

ADDITIONAL EMPLOYMENT

LSI Logic, Fremont, CA - Supplier Quality Engineer

Advanced Semiconductor Engineering, Kaoshiung, Taiwan - Process/Quality

Engineer

INTEL, Manila, Philippines - Projects/Process/Maintenance Engineer

Education

. Bachelor of Science in Electronics and Communications Engineering,

University of Santo Tomas, Manila, Philippines

. Passed Computer Based Quality Training via Resource Engineering, Inc.

with certification on: Advanced SPC, 8D Problem Solving, Six Sigma, Gage

Mentor, Lean Manufacturing, 5S, Mistake Proofing, FMEA, Measurement

System Analysis, DOE

. ASQ (American Society for Quality) Certified Quality Engineer and

Certified Reliability Engineer

. Certifications on GaAs Wafer Fab process technology trainings and

courses.

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