Design Assistant

VISHAL SRINIVAS MATAM

618-***-**** . ******.*****@*****.***

EDUCATION

Master of Science in Electrical and Computer Engineering, Southern Illinois

University Carbondale Dec 2010

GPA: 3.3/4

Bachelor of Technology in Electronics and Communication Engineering, JNTU,

Hyd, India Apr 2007 GPA:

3.4/4

ACADEMIC & PROFESSIONAL SKILLS

. Good understanding of MOS transistor theory and CMOS technology, ASIC

Design and FPGA Architectures.

. Good knowledge of Physical layout/Partitioning/Floorplanning/Placement &

Routing/Clock Distribution & Signal Integrity in the XILINX ISE tool.

. In-depth knowledge of Fault Tolerant Design for Testability (DFT)

techniques and Synthesis of Digital Circuits.

. Good knowledge of C programming language in Windows, Linux and UNIX

platforms.

. Strong interpersonal, organizational, written & oral communication

skills.

REAL WORLD EXPERIENCE

Graduate Assistant, Computer Support, Memorial Hospital of Carbondale

Jan 2009-June 2010

Duties were to use Practice Partner client to maintain patient database,

website updates in tandem with the West Frankfort division.

Intern, Corporate R&D Division, Electronics Corporation of India Limited

Dec

2006-Feb 2007

Developed and programmed a Non-Invasive Blood Pressure Measurement using

PIC18F6722 microcontroller.

Intern, R&D Division, Himachal Futuristics Communications Limited

June 2006

Programmed Microchip's PIC16F84A microcontroller unit.

COMPUTER SKILLS

Tools: Microsoft Office 2007, iWork 09, LaTeX, CUDD, gedit, Adobe

Illustrator CS5, Adobe Dreamweaver CS5, Adobe Photoshop CS5, MATLAB, XILINX

ISE, ModelSim, SILVACO, RAPPTURE, CADENCE EDA Tools Encounter RC, NC

Launch, Data Display Debugger, Gnuplot, nanoHUB simulator, vi Editor.

Languages: C, C++, VHDL, Verilog, FORTRAN, HTML, PHP, shell scripting

languages - Tcl/Tk, Unix, Perl, Python.

OS Platforms: Mac OS X Snow Leopard, Microsoft Windows XP/Vista 7, Linux

(Ubuntu, Kubuntu), UNIX.

PROJECTS

Developed & tested an Automatic Test Pattern Generation tool using CUDD

package on ISCAS'89 benchmark combinational circuits in C.

Creation & Manipulation of Reduced Order Binary Decision Diagrams (ROBDDs)

at every node, which checks for equivalence/containment at all the primary

outputs on ISCAS'85 benchmark of combinational circuits in C.

Implemented a Biquad low-pass filter with design considerations such as

data truncation, overflow/underflow and the performance was evaluated by

running a Static Timing Analyzer, physical layout/floorplanning/ placement

& routing/ clock distribution & signal integrity was done in XILINX ISE.

Experience in using Cadence Encounter RTL Compiler, which takes in

behavioral description of user designs coded in VHDL/Verilog and

synthesizes it to a gate-level netlist. Artisan TSMC 0.18um libraries were

used.

Good knowledge of Cadence NCLaunch tool to compile VHDL/Verilog codes and

check for timing issues in SimVision.

A PN Diode simulator written in FORTRAN and created a graphical user

interface (GUI) in RAPPTURE.

Relevant coursework:

1) VLSI Circuit Testing

2) VLSI Design and Test Automation

3) Synthesis and Verification of Digital Circuits

4) Nanoelectronics Devices

5) Real-Time / Embedded Systems

6) Fault Tolerant Computer Design

7) Programmable ASIC Design

8) Computational Nanoelectronics

9) Synthesis with Hardware Description Language

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