Project Design

Prathyusha

Pallerlamudi

**A E Dundee Quarter Dr

Ph No: 312-***-****

Apt #108 Palatine, IL-60074

Email:**********@*****.***

CAREER OBJECTIVE:

To enhance my technical and professional skills by acquiring an opportunity

in the field of Electrical and Computer Engineering and work for the growth

of the organization.

EDUCATIONAL QUALIFICATIONS:

> Illinois Institute of Technology

Fall 2008 to Dec, 2010*

CHICAGO, IL

CGPA:3.54/4.0

Master of Science in ECE.

> VIT University

June 2004 to May 2008

INDIA

CGPA:3.5/4.0

Bachelor of Science in EE.

TECHNICAL SKILLS:

Programming Languages : C, C++, DS, Perl,Tcl/Tk.

Packages : MATLAB, VHDL, MODELSIM, HSPICE, Cadence tools,

RSD Lite, RadioComm,

QXDM,QPST,QMICM, Cygwin,VNC.

Operating Systems : Windows 9x/2000/ NT/XP/Vista, UNIX, DOS,

Sun Solaris.

Assembly Languages : Microprocessors 8085, 8086 &

Microcontroller 8051.

Web Designing Tools : HTML, Smart draw, Adobe Photoshop, Macromedia

Flash.

Networking : TCP/IP, LAN, WLAN

WORK EXPERIENCES:

> Working as an Intern on LTE Technology (System and RF Test Engineer)

at MOTOROLA. (Since May 2010)

. Qualcomm UE IOT Support: Daily tasks involve executing test

scenarios, indentifying defects and issues, configuring the lab,

install load and performing calls. Responsibilities include

setting the LTE network consisting of multiple entities like

eNB, MME, HSS, SGW and UE to interoperate seamlessly.

. Focus of this activity is to verify that the UE and network

interoperate to give the end-user high data throughput (100Mbps

target).

. Involves RF calibration using tools like Spectrum Analyzers,

Agilent 8960 and logic analyzers, Oscilloscopes, Sanjole,

decoders (wireshark) and Motorola Proprietary tools. Responsible

for handovers at various frequencies.

. Performed various dedicated bearer procedures, Multiple PDN

connectivity and familiar with CLI and GUI prompts.

. GTP Traffic generator: Also worked on a project which involves

developing an iperf like tool that generates GTP traffic. This

tool is to serve both as a GTP client and a GTP server. It also

involves testing the GTP iperf generator ability to pump DL GTP

packets into the LTE network.

> Worked as an Intern on Automated Stability Analysis at MOTOROLA.

(September 2009 to May 2010)

. Coordinated different GSM/CDMA phones with Google Android

Technology in improving their stability through Automation using

Perl scripts.

. Responsible for training Brazilian team in rating a release and

helped them to analyze all the applications in detail which are

further analyzed to improve the stability of the release.

. Daily tasks involve creating new Defect Requests (ClearQuest and

various internal websites) which involves creating and designing

new exploratory tests.

. Working on many upcoming applications like Android Market,

Mobile Phone Portal and Moto Locate. Responsible for testing T-

Mobile specific applications and Career branded services and

execute AT commands on Mobile devices.

. Responsible for testing various Social Networking applications

like Twitter etc.

> Worked as a Research Assistant on Technology Transfer at IIT, Chicago.

PROJECTS & PRESENTATIONS:

> Cracking the Wired Equivalent Privacy (WEP) Key.

This project involves sniffing a packet of a Wireless

access point and cracking its key on Linux platform using backtrack.

> Designed a Network for a business company.

In this Project, quotation is given for starting the

company based on the company requirements like cost, space etc. The

design is in such a way that the network does not require modification

in case of future expansion of the company.

> Research project on Security of Voice over IP.

In this project, the design and implementation of various

techniques to prevent security threats have been analyzed with a

detailed overview of their pros and cons.

> Optimization of 10T full adder circuit.

Project involved in designing and characterizing

circuits using single and dual Vt threshold transistors and addressing

the problem of low power optimization.

> 32-Bit CPU design using Verilog coding.

Project involved the design and simulation of a 32-bit

Pipelined CPU with custom layout memory file.

> Designing a multicycle datapath of a custom 32-Bit RISC processor

using VHDL.

Project involved the design and simulation of VHDL code

for a 32 bit RISC Processor for a set of instructions and verified

with a test bench.

> Research project on Municipal Wi-Fi.

In this project, an emphasis is laid on creating

ubiquitous Internet access to bridge the digital gap between location

and access speed.

COURSE WORK UNDERTAKEN:

1. Computer Networks with lab. 2. Computer Organization and

Design.

3. Computer Network Security. 4. Wireless Network

Security.

5. Wireless and Mobile Networks. 6. VLSI design with lab.

7. Advanced VLSI design. 8. Electron Devices.

References will be provided upon request.

Contact this candidate