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Electrical Design

Location:
Baton Rouge, LA, 70802
Posted:
September 14, 2010

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Resume:

Yao Xu

**** ********* **. *** ****, Baton Rouge, LA 70802

225-***-****

abk6e1@r.postjobfree.com

OBJECTIVE

To obtain an electrical engineering position in industry utilizing my

related experience and education.

EDUCATION

Louisianan State University, Baton Rouge, LA

December 2010

Doctor of Philosophy in Electrical Engineering

GPA: 4.0

Louisianan State University, Baton Rouge, LA

May 2008

Master of Science in Electrical Engineering

GPA: 4.0

EXPERIENCE

Research Assistant in Department of Electrical & Computer Engineering, LSU

August 2005-present

. Test chips designed in "VLSI Design" course.

. Design energy recovery logics used in VLSI circuits.

. Designed switchable phase-locked loop circuit, drew the layout and

tested the fabricated chips.

. Designed CMOS sigma-delta analog-to-digital converter for low-power

sensor interface electronics.

. Built models for next generation field-effect transistor for circuits

design.

. Built models for interconnect wires in VLSI circuits.

Teaching Assistant in Department of Electrical & Computer Engineering, LSU

January 2009-present

. Supervise students designing and building logics using prototype board

and help to correct errors.

. Supervise students programing a CPLD and help to debug the Verilog

code.

. Graded the students' homework and exams and answered the questions in

the course of "Digital Logic".

. Edited lab manual for using Cadence to draw schematics and layout and

to simulate the designs.

Academic Project

. VLSI Design of a Continuous Time Sigma-Delta ADC.

. VLSI Design of an SRAM Array.

. VLSI Design of a 4-bit Serial to Parallel Shift Register.

TECHNICAL SKILLS

. EAD Tools: Cadence, B^2 Logic, L-Edit.

. Software Languages: Verilog, Matlab, C, C++.

AWARDS

. George Reymond Scholarship

2009-2010

. 12 finalists for the IEEE Circuits and Systems Society (CAS) Student

Paper Competition August 2009

. Fellowship of Economic Development Assistantship

2005-2009

PUBLICATIONS

1. A. Srivastava, Y. Xu and A. K. Sharma, "Carbon nanotubes for next

generation VLSI interconnects," Journal of Nanophotonics, vol. 4, no.

04169, pp.1-26, 2010.

2. Y. Xu, A. Srivastava and A. K. Sharma, "Emerging carbon nanotube

electronic circuits, modeling and performance," Journal of VLSI

Design, vol. 2010, vol. 2010, pp. 1-8. 2010.

3. Y. Xu and A. Srivastava, "A model for carbon nanotube interconnects,"

Int. J. Circ. Theor. Appl., vol. 38, no. 8, pp. 559-575, August, 2010.

4. A. Srivastava, J. M. Marulanda, Y. Xu and A. K. Sharma, "Current

transport modeling of carbon nanotube field effect transistors,"

physica status solidi (a), vol. 206, no. 7, pp. 1569-1578, 2009.

5. A. Srivastava, Y. Xu, Y. Liu, A. K. Sharma, and C. Mayberry, "CMOS LC

voltage-controlled oscillator design using multiwalled carbon nanotube

wire inductor," in Proc. International Symposium on Electronic System

Design (ISED), Bhubaneswar, India, December 20-22, 2010. (Accepted)

6. A. Srivastava, Y. Xu and R. Soundararajan, "Energy recovery techniques

for CNT-FET circuits," in Proc. International Symposium on Electronic

System Design (ISED), Bhubaneswar, India, December 20-22, 2010.

(Accepted)

7. A. Srivastava, Y. Xu, and Y. Liu, "CMOS LC voltage-controlled

oscillator design using carbon nanotube wire inductor," in Proc.

International Association of Science and Technology for Development

(IASTED) International Conference Series, Maui, Hawaii, USA, August 23-

25, 2010.

8. Y. Xu, A. Srivastava and S. Rai, "Fault Modeling in Carbon Nanotube

Based Digital Integrated Circuits," in Proc. of ASEE-Gulf Southwest

Conference, Lake Charles, LA, Mar. 24-26, 2010.

9. R. Soundararajan, A. Srivastava and Y. Xu, "A programmable second

order oversampling CMOS sigma-delta analog-to-digital converter for

low-power sensor interface electronics," in Proc. of SPIE: Smart

Structures and Materials + Nondestructive Evaluation and Health

Monitoring, San Diego, CA, USA, 2010.

10. Y. Xu, A. Srivastava, A. K. Sharma and R. K. Nahar, "Circuit modeling

and performance analysis of carbon nanotube interconnects," in Proc.

of XVth International Workshop on the Physics of Semiconductor Devices

(IWPSD), New Delhi, India, Dec. 15-19, 2009.

11. Y. Liu, A. Srivastava and Y. Xu, "A switchable PLL frequency

synthesizer and hot carrier effects," in Proc. of the 19th Great Lakes

Symposium on VLSI (GLSVLSI), Boston, MA, 2009.

12. Y. Xu, A. Srivastava and A. K. Sharma, "A model of multi-walled carbon

nanotube interconnects," in Proc. of the 52nd Midwest Symposium on

Circuits and Systems, (MWSCAS 2009), Cancun, Mexico, pp. 987-990,

August 2-5, 2009.

13. 10. Y. Xu and A. Srivastava, "Dynamic response of carbon nanotube

field effect transistor circuits," in Proc. 2009 NSTI Nanotechnology

Conference and Expo, Houston, TX, vol. 1, pp. 625-628, May 3-7, 2009.

14. Y. Xu and A. Srivastava, "Transient behavior of integrated carbon

nanotube field effect transistor circuits and bio-sensing

applications," in Proc. of SPIE: Nano-, Bio, and Info-Tech Sensors and

Systems, San Diego, CA, USA, vol. 7291, pp. 72910I-72910I-11, March 9-

13, 2009.

15. Y. Xu, A. Srivastava and J. M. Marulanda, "Emerging carbon nanotube

electronic circuits, modeling and performance," in Proc. of the 51st

Midwest Symposium on Circuits and Systems, (MWSCAS 2008), Knoxville,

TN, pp. 566-569, August 10-13, 2008.

16. Y. Xu and A. Srivastava, "New energy recovery CMOS XNOR/XOR gates," in

Proc. of the 50th Midwest Symposium on Circuits and Systems, (MWSCAS

2007), Montreal, Canada, pp. 948-951, August 5-8, 2007.

17. Y. Xu and A. Srivastava, "A two port network model of CNT-FET for RF

characterization," in Proc. of the 50th Midwest Symposium on Circuits

and Systems, (MWSCAS 2007), Montreal, Canada, pp. 626-629, August 5-8,

2007.



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