Anil Kumar P

Email: abjllg@r.postjobfree.com Ph: +91-

998*******

Career Summary:

• Engineering professional with exemplifying experience of 13 years in

Embedded Systems.

• Currently working as Development Engineer for various driver modules in Intel

Mobile Baseband Platforms. Hands on in Product Architecture, Module Design

and Implementation.

• Specialist knowledge in Audio domain for ARM based Mobile Platforms in 2G

and 3G Modems.

• Expert in system modelling of 2G and 3G modems. Excellent exposure to

hardware modules at bus levels (AMBA), CPU architecture ARM, Cortex

Teaklite, peripherals DMA, I2C, I2S, IDI, multi-processor based SOC.

• 5+ years of experience is developing ThreadX based 2G-3G Modems, device

drivers for Audio, Speech, DMA, I2C, IDI.

• Good exposure to DSP Subsystems, Speech Codecs, Polyphonic Ringer,

Acoustic Echo Canceller on Mobile Baseband platforms.

• Exposure to real time operating systems such as ThreadX and Nucleus.

• Experience in complete product development from scratch.

• Ability to grasp complex problems quickly and resolve. Broad experience in

customer interaction and working closely with different cross cultural teams.

• Experience in leading small teams of size three to eight engineers.

Educational Qualifications:

M-Tech in Digital Electronics and Communication Systems from MCE, Hassan,

Visveshwariah Technological University

B.E. in Electronics and Communication from B.I.E.T. Davangere, Kuvempu

University.

Technologies Worked on:

Prog. Languages : C, Teaklite Assembly

Current Domain : Device Drivers in 2G-3G Modems

CPU Architecture : ARM, Cortex, Teaklite, Oak, Tricore and Carmel

RTOS : Threadx, Nucleus.

Tools : ARM compiler linker RVCT, Trace 32, Lauterbach,

Oscilloscope, Signal Generator, TKL Compiler and linker,

Teaklite Simulator, ARM Simulator, Virtual System Prototype

VAST, COMET and METEOR, and SystemC. Rational

Clearcase.

Anil Kumar P

Email: abjllg@r.postjobfree.com Ph: +91-

998*******

Professional Summary:

1) Intel Mobile Communications, Feb 2011 to March 2014

2) Infineon Technologies July 2000 to January 2011

Work Experience:

System Software - 2G-3G Intel Mobile Phone Platforms (Jan 2008 – March

2014):

Intel develops and markets innovative semiconductor products and solutions for

mobile communications. The solution is notably used in smartphones and Ultra low

cost mobile phones and powered by System On Chip modems capable of Voice and

Data processing. SOCs comprising of ARM microcontroller, DSP cores, System

Memories and System Peripherals are interconnected and interact by bus and

Shared Memories.

System Software running on ARM core controls the entire system from System boot,

Driver initialization to RTOS bring-up.

Audio Driver in the system controls the Baseband Speech Processing during Voice

Call, Audio Playback, Audio Recording, FM Radio playback, Tone Generation, and full

control of Analog Front End. All the above functionalities run on Teaklite DSP core

and are controlled by commands sent by audio driver running on ARM core through

Shared memory.

My Responsibilities and Scope of Work in Audio Driver Team:

Design and Development of Audio Driver controlling voice processing and

testing with Rohde and Schwarz network simulator and normal voice call for

NMR, WAMR, FR and HFR codecs.

Design and Development of driver for PCM player and PCM recorder and

testing with Multimedia Framework for various sampling rates between 8 KHz

and 48 KHz.

Design Development and testing of FM Radio driver, Driver for Analog front

end and Tone Generation.

Customizing and Tuning the driver for variance platforms.

Customer interaction for Audio Driver for Samsung Korea. Handling customer

requirements and getting them delivered.

Driving integration camps at customer sites Samsung Korea for audio bring-up

and complete testing of audio components.

Initiated driver improvements for enhanced System Debugging, to capture

speech samples during Voice Call and Audio Samples during PCM playback

and Recording, used for post analysis to debug any occurrences of Noise.

Debugging driver issues in the system using Trace 32.

Tools used: ARM compiler linker, Trace 32 for Debugging, Oscilloscope, Signal

Generator, Rohde and Schwarz network simulator.

Anil Kumar P

Email: abjllg@r.postjobfree.com Ph: +91-

998*******

Core Driver comprises of drivers for system components DMA, I2C, IDI, Network on

Chip, System Contol Unit and ARM memory management.

My Responsibilities and Scope of Work:

Design and Driving the Development of IDI driver connecting DBB (Digital

Baseband) and ABB (Analog Baseband) based on MIPI protocol.

Design and Driving the driver design for NOC (Network on chip) and driving

towards completion.

I2C Driver maintenance and driver improvement to improve performance for

multiple I2C controllers.

Driving a team of 7-8 engineers spread across multiple geographic locations to

handle the driver maintenance and ARM memory management for variance

platforms.

Handling work package estimations for Core Drivers from System

Requirements and driving them to completion.

Tools used: ARM compiler linker, Trace 32 and Lauterbach for Debugging,

Oscilloscope and MSPE for planning.

DSP Firmware – 2G-3G Infineon Mobile Phone Platform (2000-2003) and (2005-

2008):

Infineon Mobile Phone platform has multiple DSP cores dedicated for Modem Audio

and Speech Processing functionalities. Connected through Shared Memory and

controlled by ARM microcontroller through commands and interrupts. Speech Codec

Algorithms, FIR, IIR filters, PCM Player, Recorder, FM Radio Firmware, MIDI

synthesizer, Acoustic Echo Canceller run on Audio DSP core. A command interpreter

on DSP, triggered by interrupt from uC receives commands, interprets and schedules

appropriate algorithm to run.

My Responsibilities and Scope of Work in DSP Firmware Team (2005 - 2008)

Design and Development of Command Interpreter for uC and DSP

Communication. Development of commands for Bootloader, MIDI Synthesizer,

Acoustic Echo Canceller.

Design and Development of Audio Scheduler for MIDI synthesizer, Acoustic

Echo canceller and complete control of audio DSP sub-system.

Development of Sample Rate Converters to match algorithm output sampling

Rate (8 KHz or 16 KHz) to the sampling rate of the ports (8 or 16 or 32 KHz).

Estimation of memory sizes for RAM, ROM for Program and Data and

optimizing memory consumption.

Porting of MIDI Synthesizer to Teaklite core. Interface design for MIDI

synthesizer between uC and DSP. MIDI information from file system, formatted

into packets by uC and sent to DSP in regular intervals driven by interrupts

between DSP and uC. The FW on DSP ensures timely scheduling of MIDI

Anil Kumar P

Email: abjllg@r.postjobfree.com Ph: +91-

998*******

synthesizer which converts MIDI to audio samples and delivery of audio

samples to Analog Front End.

Porting of Acoustic Echo canceller to Teaklite core. Configuring ADC ports for

Data acquisition, scheduling AEC algorithm and delivering samples to DAC

ports.

Strategic placement of data sections in X-space and Y-space to tap the

potential of Teaklite architecture for optimal performance.

Support for Tuning of Acoustic Echo canceller, pre and post processing at

customer site to best match the phone aesthetics.

Co-ordination and communicating across multiple development sites for

technical discussions, delivery of code and delivery of ROM code to HW team

for timely chip roll out.

Design and Development of Virtual System Prototype to test the firmware

being developed and used for several months before the actual HW was

available. Virtual System comprised of Teaklite simulator (supplied by CEVA),

Shared Memory between uC and DSP, RAM, ROM and other peripherals. File

interface support for all the ports. Samples written to files along with suitable

header were used for analysis and comparison with standard vectors and tools

like Audacity used to play and compare with MIDI playback.

Worked as Team Lead for DSP sub-system with team size of 5 engineers.

My Responsibilities and Scope of Work in DSP Firmware Team (July 2000 -

2003)

Development of GSM Equalizer, Channel Codecs (2G Physical layer) on

Tricore Processor and Carmel Processor and optimizing for Mips.

Development of Modulator and Demodulators comprising of GMSK and 8PSK

models in 2G modems on Tricore and Carmel processors and optimizing for

Mips.

Implementation of Speech Codecs based on CELP algorithms on Tricore

Processor and optimizing for Mips.

Tools used: TKL Compiler and linker, Teaklite Simulator, Makefiles, Virtual System

Platform.

Virtual System Platform Development – 2G–3G Infineon Mobile Phone Platform

(2003-2005):

Infineon Virtual System Platforms provide environment for early software

development. Software Component owners can design and test their software

months before a hardware prototype is available and facilitates rapid debug of

complex hardware and software issues handling the ever increasing complexity and

time-to-market pressures in the design of System On Chips

All the components like System Bus, System Peripherals, Memories, Processors,

Clock Generating Unit, System Control Unit, are modelled in C/C++/SystemC and

Anil Kumar P

Email: abjllg@r.postjobfree.com Ph: +91-

998*******

interconnected, resulting in a virtual platform that is functionally complete and

accurate at the register levels.

Processor models of ARM, Teaklite are supplied by ARM and CEVA. Rest of the

system components are modelled to cycle accurate level and connected by Bus to

Processor and other Bus Masters.

CoMET a system engineering tool from VaST is used as development tool and

METeor for simulations.

My Responsibilities and Scope of Work in Virtual Prototype Team (2003 - 2005)

Design and Development of IIC module which involved implementing the IIC

protocol. Design and development of test environment with multiple IIC

instances, interconnected by IIC bus and through test benches to user. Testing

and validating the IIC protocol with various test scenarios and Multiple-Master

arbitration simulation to simulate the bus arbitration.

Design and Development of Synchronous Serial Controllers, UART, Display

Interface, System control blocks, Watch Dog timers, DMA, Clock Generation

Unit, Interrupt Control Unit for RESET and BOOT Control, FIFOs and

associated Flow Control Signals.

Design and Development of I2S peripheral module which involved

implementation of I2S protocol, testing and validating the I2S protocol, creation

of multiple instances to simulate the complete data transfer.

Design and Development of Analog Front End upto the Digital Interface.

Design and Development of Shared Memory between ARM and Teaklite DSP.

Involved in development of Testbenches for system peripherals, which also

comprised of user interfaces to configure peripherals and file IO to feed in test

vectors.

Worked as Team Lead for Bangalore site for Virtual Platforms with size of 3

engineers.

Tools used: C, C++, VAST, COMET and METEOR, and System C.

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