Cheol Hee Park
Work Address
Communications, Networks and Systems
Dept. of Electrical and Computer Engineering
Phone: (Cell) 512-***-****
The University of Texas at Austin E-
mail: abj9ax@r.postjobfree.com
Austin, TX 78712-0240
Objective Applying for Sr. Digital Signal Processing Research Engineer
Research Interests
Signal Processing, Wireless Communications, and SoC Design
Education
Aug. 2004 - University of Texas at Austin
Austin, TX
Current Ph.D. candidate in the Dept. of Electrical and Computer
Engineering, GPA:3.9/4.0
Dissertation: System Level Trade-offs of Frequency Domain
Processing for Wireless Communications
Mar. 1995 - Chung-Ang University*
Seoul, Korea
Feb. 1997 Master of Engineering in Electronic Engineering, Digital
Signal Processing, GPA:4.26/4.50
Thesis: A MLSE for Digital Communication Channels in Impulsive
Noise Environments
Mar. 1991 - Chung-Ang University
Seoul, Korea
Feb. 1995 Bachelor of Electronic Engineering, GPA: 4.17/4.50
Graduated with the highest honor in the Department - ranked 1st
in Electronic Engineering
Related Course Works
. Digital Signal Processing* . Adaptive
Signal Processing*
. Nonlinear Programming . Embedded System
Model/Design
. Probability & Stochastic Process I . Estimation
Theory
. Optimization in Engineering Systems . Stochastic
Optimization
. Information Theory . System On a Chip
(SOC) Design
. VLSI Communication Systems . Wireless
Communications
. Digital Communications * .
Communication Networks
. Advanced Wireless Communications: Modulation & Multiple
Access
. Analysis and Design of Communication Network
Academic Experience
Spr. 2008 - The University of Texas at Austin
Current Teaching Assistant
. Digital Signal Processing, Digital Design, S/W Programming,
and Wireless Communications
Jul. 2005 - The University of Texas at Austin
May 2007 Graduate Research Assistant: Wireless Communication, Digital
Signal Processing, Digital Design
. Multi-gigabit (60GHz mmW) wireless communications
- Algorithms and system design for multi-gigabit wireless
communications
- Implementation by using DSP and FPGA (Simulink and
Xilinx's System Generator)
- Medium Access Control (MAC) protocol
Mar. 1995 - Chung-Ang University
Seoul, Korea
Dec. 1996 Graduate Research Assistant: Wireless Communication, Digital
Signal Processing
. Channel estimation and equalization for wireless
communications
. Digital filer design for video format converting, LG, South
Korea
. Digital signal processing for auto focusing algorithm, LG,
South Korea
Professional Engineering Experience
May 2008 - Qualcomm, Inc.
San Diego
Aug. 2008 Interim System Engineering Intern: Wireless Communication,
Digital Signal Processing, System
. HSUPA (WCDMA cellular wireless communication) system
development
- Analyzed link and system level performance
- Developed a link level simulator (C/C++,
Matlab/Simulink, and Perl)
May 2007 - Qualcomm, Inc.
San Diego
Dec. 2007 Interim System Engineering Intern: Wireless Communication,
Digital Signal Processing, System
. WPAN wireless communication system development
- Analyzed and verified PHY layer algorithms and design
- Developed a link-level simulator (C/C++, Matlab, and
Python)
Oct. 1999 - Korea Electronics Technology Institute
Pundang, Korea
Jul. 2004 Senior Researcher: Wireless Communication, System,
Digital Signal Processing, Digital Design
. SF-Device (Wireless Sensor Network) development
- Researched physical layer (PHY) technologies
- Implemented a baseband system (C/C++, Matlab/Simulink,
Verilog) and integrated RF system
. Wireless multiple access chipset design by using multiphase
modulation
- Researched Binary-CDMA physical layer (wireless
communication modem) technologies
- Implemented a baseband system (C/C++, Matlab/Simulink,
Verilog) and integrated RF system
. Digital Audio Broadcasting (Eureka 147) receiver chipset
development
- Designed a DAB receiver
- Designed DAB test systems
. Wireless Personal Area Network (WPAN) Core IP design
- Researched WPAN physical layer technologies
- Designed Bluetooth system Core IPs (C/C++,
Matlab/Simulink, Verilog/VHDL)
Jan. 1997 - Hyundai Electronic Industry Co.
Seoul, Korea
Oct. 1999 Mobile Communication Terminal R&D Division
Research Engineer: Wireless Communication, RF, Mobile Terminal
. IS-95 CDMA mobile terminal development
- Developed S/W systems for radio system control
- Designed and tested digital systems of mobile terminals
Satellite Division
Assistant Research Engineer: Digital Signal Processing, RF
Design
. Phased array antenna system development
- Designed S/W (C/C++, Matlab) and H/W beamforming
control systems
- Designed a phase shifter (Ku band)
Skills . Simulation & Analysis: C/C++, Matlab, Simulink, LabView,
SPW, SystemView
. Digital design and HDL (Verilog and VHDL): NC-Sim, Modelsim,
Synplify Pro, Debussy, Xilinx ISE and System Generator, FPGA
(Xilinx and Altera)
. SoC design: SystemC (ConvergenSC), SpecC
. Digital signal processing and wireless communications
. RF circuits integrating and testing
. Software Programming: C/C++ (, Python, Perl)
Honors and Awards
. Best Researcher Award, Aug. 2002, Korea Electronics
Technology Institute, Korea
. Bronze Award for Best Project, Dec. 2000, Korea Electronics
Technology Institute, Korea
. Hyundai Graduate Scholarship, 1995 ~ 1996, Hyundai, Ichon,
Korea
. LG Yonam Foundation Scholarship, 1992 ~ 1994, LG, Seoul,
Korea
. Honors Scholarship, 1992 ~ 1994, Chung-Ang University, Seoul,
Korea
. Freshmen Special Scholarships, Mar. 1991, Chung-Ang
University, Seoul, Korea
Patents 1. CheolHee Park, et. al., "Apparatus for constant amplitude
coded bi-orthogonal modulation and demodulation, JP2003-2012
2. CheolHee Park, et. al., "Apparatus for transmitting a data
in a wireless communications," US10/391,023.
3. CheolHee Park, et. al., "Apparatus for compensating a DC-
offset in a Bluetooth," US09/643,182.
4. CheolHee Park, et. al., "Adaptive frequency hopping
apparatus in wireless personal area network system," US
10/391,023.
5. CheolHee Park, et. al., "Apparatus for compensating a
channel distortion in a, " US09/643,086.
6. Others : Korea - 20 inventions
Visa Status Student Visa (F-1)