Engineer Design

David W. Storey

***** ******** ****

Boonsboro, MD 21713

(Ph 240-***-****, abipl8@r.postjobfree.com)

EXPERIENCE SUMMARY

Over 20 years of hands-on system architecture, hardware design, design

verification and support in various development applications from design

concept to production. Developed products in the aerospace, defense, as

well as commercial communication industries. System, board, and/or

programmable devices (FPGA) have developed with different requirements in

power, device downloading, environmental noise emission, thermal, and space

restrictions. These designs have utilized redundant or single source power,

backplanes/stand alone enclosures, multi-layer boards shielded or un-

shielded with embedded microprocessors, programmable devices such as CPLD's

and FPGA's, memory, mixed signal with ADC/DAC converters, LCD displays and

many interface specific devices. Performed as team leader, hardware

developer, as well as system architect on many design projects requiring

communication, multitasking, and coordination to peer development groups.

PROFESSIONAL EXPERIENCE

MEI Technologies, Inc., Greenbelt, MD Senior Electrical Engineer III

8/09 - present

Engineering design work supporting NASA's GPM program. Responsible for the

design of a MIL STD1553b controlled Propulsion card utilizing Mentor

Graphics schematic capture, analyzing circuits, writing test procedures and

testing hardware. Writing VHDL simulation test benches to verify ACTEL

RTSX72SU FPGA's meet design requirements utilizing Model Sim simulation

tools. Testing and re-designing if required spacecraft modules utilizing

Radiation tolerant components. Communicated with other groups to ensure

design intent is met and document the results.

BAE Systems, Johnston City, NY, Principal

Verification/Design Engineer 8/08 - 5/09

Performed as a member of a technical team ensuring aerospace rotor control

assembly meets DO-254 design assurance. Re-wrote VHDL simulation test

benches, wrote board verification and test procedures, and performed

verification tests. Documented the results ensuring all meet DO-254 design

assurance standards. Effort utilized Model Sim, test fixtures, directed

rework, and coordinated with other groups in the verification process.

Fairchild Controls, Frederick, MD, Principal FPGA

Development Engineer 12/03 - 12/07

Developed various military servo control VHDL FPGA mixed signal designs for

a cooling system, debugged and coordinated with board designers to ensure

proper interconnect. Communicated with other groups to ensure system

design intent was meet. Generated design documentation, specified FPGA, and

debugged the design.

Corvis/Dorsal, Columbia, MD, Senior Digital Signal Engineer III

4/02 - 12/03

As Hardware team lead, coordinating and designing the electrical control of

an EFMA optical amplifier. Also re-designed and debugged two hardware

boards, Micro controller Card and Pump Laser Card. The Micro controller

Card consisted of a Motorola M-core (2107) microcontroller, FLASH memory,

SPI A/D and D/A converters, and an Altera 20K160 FPGA. Developed an Altera

20K160 FPGA in VHDL code and simulated with a VHDL test bench utilizing

Model Sim tools. The Pump Laser Card contained a Fitel Laser, and control

interface.

Arbitron, Columbia, MD, FPGA/Detail Hardware Engineer

9/01 - 3/02

Debugged board and FPGA design on an Analog/Digital audio encoder unit. The

audio encoder utilized Analog Device's 21160 DSP, Intel 80186

microprocessor, FLASH memory, A/D converters, digital encoder IC's and

Altera 1K30/1K50 FPGA's. This effort involved understanding the design

quickly and re-designing problem areas so unit became operational. FPGA

design problems were corrected by generating a new VHDL simulation test

bench utilizing Model Sim.

Viacast Inc., Ijamsville, MD, Principal FPGA/Hardware

Development Engineer 1/01 -9/01

Corrected various design bugs on a video encapsulator unit, utilizing

Altera 10K30 and 10K50 FPGA's. Effort involved building a VHDL simulation

platform utilizing Model Sim and creating a new VHDL test bench to discover

problems.

Orbital Sciences Corporation, Germantown, MD, Senior FPGA

Development Engineer 1/98 -- 1/01

As a FPGA designer developed various aerospace military aircraft FPGA

designs utilizing Xilinx 4028 to Virtex 400 FPGA's in VHDL and simulated

the designs via Model Sim by writing VHDL test benchs. These designs

interfaced to data storage, alarm monitoring, microprocessor control logic,

SDRAM, AD SPARC (21060) DSP, VME devices, and PCI devices. The PCI

interface design utilized a download VHDL Xilinx PCI core.

Resume D. Storey Continued

Watkins Johnson, Gaithersburg, MD, Hardware Telecommunication Fpga Engineer

1/96--12/97

Hardware project leader/designer developed a Digital Cellular IS-136 Base

Station Controller containing a Cots' VME based 68040 board with a MC860AH,

PMC module. Design utilized Altera 7192 CPLD's, and one 10K20 FPGA (AHDL,

and VHDL based), providing access to a VXI, Ethernet, I2C, and four T1/E1

interfaces.

GRC INTERNATIONAL, Columbia, MD, Hardware FPGA Telecom Design Engineer

9/95-12/96

Performed as lead development engineer on an optical fiber OC3 test access

card, scheduled tasks, and developed hardware utilizing ECL/PECL logic, and

coordinated tasks until completion. Developed a SONET VC-12 Overhead

Monitor board and a Xilinx 4013E FPGA which accumulated alarm defect

information. Generated specifications and production documentation,

designed hardware, and debugged/tested design the hardware.

HUGHES NETWORK SYSTEMS, Germantown, MD, Senior Member Technical Staff

11/93--9/95

Responsible for solving hardware system/board development problems on a

newly release Digital Cellular (AMPS, CDPD, & TDMA) telecommunication

system. Provided technical support and recommended design changes for

system/board problems. Generated documentation and supervised product

acceptance testing, product evaluation, and implement design modifications

to cellular equipment.

SFA DATACOMM INC., Frederick, MD, System/Senior Design Engineer

6/90--11/93

Responsible for development and support of all data packet products.

Investigated and evaluated product enhancements to provide most cost-

effective solutions. Primary focus was the system/detail design definition

and implementation of the next generation products, involving four data

Packet Switch units. Specified and developed a 68EC030 based system

controller/port board, and a 68302 based high-speed port board, all

containing DRAM, FLASH. Etc.

DATA GENERAL TELECOM, Rockville, MD Hardware Section Manager/Senior

Engineer 1/88--6/90

Provided project leadership and direction for two engineers and two

technicians for an ISDN Terminal Adaptor, from subsystem specification,

designing prototypes, debugging and final production of three 68000 boards.

Developed a 68000 microprocessor based asynchronous/synchronous circuit

switchboard utilizing ISDN I.463 rate adaptation technique. Patent received

for ISDN modification to rate adaptation technique.

GTE TELENET, Reston, VA /Northlake, IL, Senior Design Engineer III

12/84--1/88

As a board designer developed a X.25 packet board on a voice/data digital

telecommunication switch, providing virtual circuit access between end

users via a T1 (DS1).

NORTHERN TELECOM, INC., Research Triangle Park, NC, Hardware Design

Engineer III 8/80--12/84

Developed an 8088 microprocessor based X.25/X.28 packet board utilizing

DRAM, DMA controller, and Digital logic for a DMS-10 Digital Telco Switch.

Performed hardware product support on a DMS-10 Digital Telco Switch

(corrected designs issues in the power supply, storage units, main CPU, and

the Telco interfaces).

MARTIN MARIETTA AEROSPACE, Orlando, FL Logistic/Maintainability Engineer

6/78--8/80

Analyzed in detail analog/digital hardware circuits and performed system

test functions on a surface to air missile system. Obtained a secret

clearance.

UNITED STATES MARINE CORP., Jacksonville, NC

9/71--2/75

Aviation Electrician (MILITARY) Electrical maintenance on a CH-46

helicopters. Honorable Discharge.

EDUCATION

M.B.A., Management, North Carolina State University (2/3 complete) B.S.,

Electrical Engineering (major concentration: Digital/Communications),

Virginia Polytechnic Institute and State University, 1978. Attended

hardware seminars and workshops on various telecommunication and

microprocessor applications.

TECHNICAL SKILLS

Familiar with Microprocessors/controllers, DSP's, RISC processors,

Schematic capture (ORCAD, MENTOR, And Cadence), Xilinx (Foundation), Altera

(Quartus/Max+Plus), Model Sim, VHDL, Synplicty, Statecad, VHDL Code &

Simulation Test Bench, MS office..Etc, .X.25, TCP_IP, I2C, SPI, PCI, VME

DESIGNS INCLUDE

Microprocessors/controllers (Intel, Motorola, Pic based), DSPs, DMAC,

Memory (FIFO, NVRAM, SRAM, FLASH, DPRAM), Mixed signal Analog to Digital

Interfaces (DAC/ADC), Protocol Devices (asynchronous/synchronous HDLC),

Telecom (slic/slac), modems, Fiber Optical Lasers/diodes, Circuit/Packet

Switching, Power Supplies (Redundant, Hot swap, standalone),BIT, Backplane

Architectures (VME, PCI to custom designs), FPGA, CPLD (Altera, Xilinx, and

Actel) FPGA code design down loads, JTAG, In system programming, FCC, UL,CE

approvals,DO-254, Cost and space estimating, and power/thermal studies.

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