Project Manager Engineer

Tibet Mimar, Ph.D. *** Via Loma 408-***-****

Morgan Hill CA 95037 *****@*********.**

m

Technology & Engineering Executive

Professional Summary

http://www.linkedin.com/pub/1/54/332

. Multidisciplinary technologist and entrepreneur.

. Strong background in hardware, software engineering, system

architecture, and electro-mechanical product development. 22 patents in

processor/SoC architectures and digital media processing.

. Proficient in managing large engineering teams (300+) and multiple

engineering disciplines in a complex environment culminating in high-

volume production.

. Proven ability managing multi-site development centers and off-shore

centers in China, Europe and USA.

. Strategic thinker with a proven ability to execute and proven success

devising and establishing efficient processes that deliver solid ROI

for cutting-edge technology organizations.

. Customer focus and total quality leadership. Cost reduction, TTM, eBOM

and process cost optimization.

. Strong verbal and written communications skills in English and Turkish,

articulate speaker. US Citizen.

Core Competencies

PERFORMANCE MANAGEMENT Product Development Process MPEG Committee (9 years)

Multi-Site Management USA Patent Drafting &

Project Management Prosecution Mobile (PMP, Cell Phone)

3 yrs Overseas Consumer Electronics (TV,

Experience STB) Audio & Video Processing

System & SoC Development

Processors: RISC, SIMD,

VLIW

Professional Experience

IMAGINE COMMUNICATIONS, VP, ENGINEERING 9/2009-

VESTEL (#2 TV AND SET TOP BOX MANUFACTURER IN EUROPE WITH > 8 M SHIPPED

ANNUALLY) 1/2009-8/2009

Consultant: TV Product Definition, architecture standardization and Cost

Optimization

Trident Microsystems (A Silicon Valley 150 Company) - Santa Clara, CA

4/2008 - 11/2008

Consultant

> TV Product Road Map definition, product MRD/PRDs, and product

specifications;

> MRD for EPD (Electrophoretic Paper) Displays for eBook and eNewspaper;

> Set top box product road map; Special tier-1 DTV product proposals.

GRUNDIG (BEKO) ELECTRONIK - Part of Fortune 500 Company (TV & Set Top

Boxes) 2005-2008

Executive Vice President of Engineering & Chief Technology Officer

Lead 330+ engineering team across 4 global locations in all aspects of

technology and engineering. Directed 20 concurrent major consumer

electronic platform projects. Reporting to CEO with 12 direct reports

managing mechanical, hardware design, software design, applications,

engineering services, benchmarking, project office, QA, performance

testing, patent and IP office groups. Plan and administer $25M annual

operating budget. Designed and produced products under the brand names of

Sony, Toshiba, Grundig, Beko and others.

> Over $1.5B in annual sales of TV, set top box and other CE products as

second largest producer in Europe. Filled in gaps in TV products

range. Responsible for overall product road map and execution.

> Launched one of world's first Full HD TV (1920 x 1080p) with motion

compensation, which won CES Innovations 2008 Award in video display

category.

> Launched differentiated products in consumer electronics that included

TV with live pause, built-in personal video recorder (PVR) - in 3.5

months from start to MP. Created other innovative products:

. Portable media players (PMP) with SD Card, GPS, DVB-H, MPEG-4.10

& place-shifting.

. TV without any input wires communicating audio and video over

power line using HomePlug AV.

. HD set top box with PVR and DVB-S2 features.

> eBOM, mechanical and manufacturing process cost reduction using

innovative methods.

> Instituted engineering process flow and tools to streamline product

development activities that substantially reduced concept-to-market

delivery (TTM) cycle time.

> Started benchmarking group and quality programs (Six Sigma) to

optimize cost and quality.

> Initiated software quality assurance (SQA) group and CMM level 4

certification process.

> Received 4th patent position award among all local companies with

incentives and training.

> Designed and produced PVR set top boxes under Sony brand name.

> Cell Phone with Camera ISP capability

> European gas station record keeping and billing system (Zigbee and

cell tower communication)

> Made transition to ROHS compliance and met Sony Green Partner

requirements in one quarter.

ATHEROS COMMUNICATIONS (Wireless Systems and Networking) - Sunnyvale,

California 2004-2005

Director of Video Systems

Oversaw design and development of 802.11n MIMO wireless chipset for

enhanced video transmission with reduced jitter and constant delay

abstraction. Collaborated with television and MPEG manufacturers, such as

Sony, Samsung, HP, Toshiba, Zoran, Sharp, and NEC to ascertain engineering

needs for digital television and media adapter products. Coordinated

software development with third-party firms.

> Teamed with MPEG chip vendors to create unified chip designs and to

present products at industry exhibitions including wireless TV,

Digital Media Adapters and wireless speakers.

> Led joint wireless TV and Digital Media Adapter development projects

with strategic partners.

SPREADVISION (DTV SOC Company) - Sunnyvale, California 2003-2004

Founder & CEO

Launched and directed operations to devise system-on-chip (SoC)

architecture solutions for single-chip IDTV digital television applications

including MPEG-2 and MPEG4.10 (H.264) video codec support.

> Evaluated code developed and analyzed performance of various video

compression algorithms

> Orchestrated design of processor and SoC with Vector Processing

architecture with 12 formal patents.

NEXTRAY (Medical X-Ray Imaging Systems Company) - Los Gatos, California

2001-2003

Project Manager/Senior Staff Engineer

Directed technical teams in full project lifecycle, from requirements

gathering/analysis to solution design and engineering to prototyping and

delivery for video enhancement. Defined formal project plans.

> 17 VLIW DSP multi-processor architecture to manage 16 concurrent real-

time video input streams.

> Developed 17-DSP (TMS3206414@600 MHz) video processing board in

conjunction with a large Virtex-2 4000 FPGA chip and all its Verilog

coding. Also wrote all C programs running on 17 DSPs.

UBICOM, INC. (Network and Media Processors) - Mountain View, California

1999-2001

Director of Software Engineering & Architecture

> Starting with 1 engineer assembled and led team of more than 40+

software engineering professionals from all over the world plus

consultants to design and develop networking and communication

processor chips and related software. Made VC presentations and

secured 48M round C financing.

> Managed two generations of processor chips from concept to production.

Also, started SQA group.

> Served as Chief Chip Architect for all chip development. Lead 32-bit

RISC processor design with instruction-level multi-threading and

memory-to-memory architecture and filed six patents

> Secured and managed $3M tool chain development contracts with Red Hat.

SILICON GRAPHICS, INC. - Mountain View, California 1993-1999

Graphics Software/Digital Media Engineer & Project Manager/MTS

Designed and developed OpenGL imaging extensions for full-color graphical

solutions as well as digital media compression products.

> Achieved more than 1M workstation units (O2 model) shipped with no

reported defects.

> Managed Dual-channel motion-JPEG multimedia board project with five

ASIC chips developed

> Wrote all of OpenGL imaging extensions library code to implement pixel-

texture, color-matrix, histogram, 2-D convolution, color-cell

compression, and so on for workstations.

> Developed all microcode for Video and Image Compression Engine (VICE)

co-processor chip, including processing to implement digital image-

processing functions for OpenGL API.

> Worked on Audio-Video Compression project. Licensed AEC (acoustical-

echo cancellation) from AT&T. Came up with audio-video synchronization

scheme for workstations that is MPEG-2 complaint.

COMPRESSION LABS, INC. (Video Conferencing Systems Company) - San Jose, CA

1987-1993

Director of Engineering

Oversaw 50-person team of engineers, technicians, and managers coordinating

design and development of video conferencing systems. Managed joint

development performed by technology partners such as Sony. Established

standards for engineering design flow, rules and guidelines. Stock went

from $2.50 to $35 during my tenure.

> Managed architecture and development of all parts and aspects of two

generations of room video conferencing systems, which generated most

of the company revenues for 10+ years.

> Architected high-end programmable (algorithm updatable via memory

cartridge) video conferencing system using multiple DSPs in MIMD

architecture.

> Architected and designed pan-tilt camera module to control camera

functions (using micro step control of two stepper motors), as well as

writing all software for this camera.

> Authored specification, product definition, cost estimates, and

working for multiple product designs for both in-house and third-party

projects. Designed and outsourced the remote controller (RCU).

> My team also designed audio-video front-end design including AEC

(algorithm licensed from Philips).

> Network interface modules designed by my group included: T1/E1/J1,

V.35, ISDN 2B+D, etc.

IDENTIX, INC. (Biometric Security) - San Jose, CA 1985-1987

Hardware and Algorithm Engineer

Worked on biometric security algorithms. Developed a finger print capture

and display hardware for law enforcement in Europe and USA.

VICOM, INC. (Video Image Processing Systems) - San Jose, CA 1983-1985

Hardware and Software Engineer

Designed the first-to-market real-time digital video hard disk storage

controller storing 1 minute of RGB color video on 3GB disk. Also wrote all

code for the 68K controller processor. Shipped many units to research

facilities and universities for video compression and processing algorithm

development.

QUANTEX, INC. (Medical Video Imaging Company) - Sunnyvale, CA 1981-1983

Hardware Design Engineer

Architected and designed the hardware of real-time video processing system

for medical imaging.

EDUCATION AND CREDENTIALS

Doctor of Philosophy (PhD) in Computer Engineering (GPA: 3.85)

Thesis Title: Fast Implementation Method for 2-D FIR Filters for Digital

Image Processing

Oakland University, Rochester, Michigan

Master of Electrical Engineering (GPA: 3.87); Bachelor of Electrical

Engineering (GPA: 3.50)

Bosphorus University, Istanbul, Turkey

Technical Proficiencies

AUDIO & VIDEO MPEG-2, MPEG-4, H.263, H.264, JPEG, VC1, WAVELETS,

G.72X, AEC

Streaming Video, Adaptive Streaming, Vector Processing

Image/Video Temporal, Rank, Motion Adaptive Filtering, MCTF, Camera

Processing ISP

Digital Signal GPS (L1C & L2C) algorithms, signal processing

Processing algorithms for x-ray imaging, fingerprint recognition

algorithms, adaptive FIR, IIR, FFT, LFSR.

Processor SIMD, RISC+SIMD, MIMD, VLIW, MIPS & ARM ISA,

Architecture multithreading ISA

3-D OpenGL (pipeline coding, driver coding, API, openGL

Languages certificate)

MIPS and 68K Assembly, SIMD Microcode, C, C++, Java,

and Verilog

Consumer Electronics DTV, IDTV, ipTV, mobile TV, PMP, DSC, Cell Phone,

Set-top boxes, Interactive TV.

UI Design Graphical User Interface Optimization for ease-of-use

Manufacturing and set up.

DFT, DFM, Six-sigma, BOM and manufacturing process cost

optimization

Publications & Teaching & Consulting

. AUTHORED A TEXT BOOK PUBLISHED BY PRENTICE-HALL, INC. "PROGRAMMING AND

DESIGNING WITH THE 68000 FAMILY," 1991. THIS BOOK SOLD IN USA, EUROPE,

AND ASIA.

. Digital Image Processing Course at University of California Berkeley

Extension, 1987 (2 quarters)

. Visiting Professor for Digital Image Processing Course at Bosphorus

University, Istanbul, 1998, Q1.

. Intel Corp (4 months): Consulted for e-Book and e-Newspaper using the

upcoming Electrophoretic displays.

Patents (As Tibet Mimar/Mimaroglu) - 22 Patents

# PATENT TITLE (USPTO) NUMBER

1 METHOD FOR PROGRAMMABLE MOTION ESTIMATION IN SIMD PROCESSOR 7,126,991

2 METHOD FOR FAST AND FLEXIBLE SCAN CONVERSION AND MATRIX 6,963,341

TRANSPOSE IN SIMD PROCESSOR

3 METHOD FOR IMPLEMENTING VECTOR LOOK-UP TABLE OPERATIONS IN 10,357,900

SIMD PROCESSOR

4 METHOD FOR PARALLEL HISTOGRAM CALCULATIONS IN SIMD AND VLIW 7,506,135

PROCESSOR

5 METHOD FOR PROVIDING EFFICIENT LOAD OF SIMD VECTOR 10,357,640

REGISTERS

6 METHOD AND APPARATUS FOR COMBINING RISC AND SIMD PROCESSOR 10,622,601

7 METHOD FOR EFFICIENT HANDLING OF VECTOR HIGH LEVEL LANGUAGE 10,441,336

CONDITIONAL CONSTRUCTS

8 FLEXIBLE VECTOR MODES OF OPERATION FOR SIMD PROCESSOR 10,357,632

9 AUDIO AND VIDEO PROCESSING APPARATUS 10,357,644

10 FLEXIBLE METHOD OF MAPPING OF VECTOR REGISTER ELEMENTS 10,357,805

11 METHOD FOR EFFICIENT MATRIX MULTIPLICATION IN SIMD 10,819,059

PROCESSOR ARCHITECTURE

12 METHOD FOR EFFICIENT LFSR CALCULATIONS IN A SIMD PROCESSOR 11,923,576

ARCHITECTURE

13 SYSTEM AND METHOD FOR READING AND WRITING A THREAD STATE IN 7,120,783

A MULTITHREADED CPU

14 MEMORY TO MEMORY ARITHMETIC AND ARCHITECTURE FOR A 7,047,396

COMMUNICATIONS EMBEDDED PROCESSOR

15 MODULAR SERIALIZER/DESERIALIZER 7,010,612

16 SYSTEM AND METHOD FOR INSTRUCTION LEVEL MULTITHREADING 7,082,519

SCHEDULING IN A PROCESSOR

17 METHOD FOR EFFICIENT DCT CALCULATIONS IN A PROGRAMMABLE 12,586,357

PROCESSOR

18 METHOD FOR EFFICIENT AND PARALLEL DATA ARRAY SORTING IN A 12,586,356

PROGRAMMABLE PROCESSOR

19 METHOD FOR EFFICIENT AND PARALLEL COLOR SPACE CONVERSION IN 12,586,358

A PROGRAMMABLE PROCESSOR

20 METHOD FOR EFFICIENT OPCODE CODING IN A MULTI-ISSUE 12,586,354

PROCESSOR

21 MOBILE SECURITY AUDIO-VIDEO RECORDER WITH LOCAL STORAGE AND 12,586,374

CONTINUOUS RECORDING LOOP

22 NETWORKED SECURITY CAMERA WITH LOCAL STORAGE AND CONTINUOUS 12,586,355

RECORDING LOOP

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