TANVI KOTHARI
*** * **** **** ***, Apt G***, Sunnyvale CA-94086 phone: 201-***-**** email: abicnx@r.postjobfree.com
E D UCAT IO N
M aste r of Science i n E lec t r ica l E ng i nee r i ng, U n iversi t y of Southe rn Cal ifor n ia ( GPA 3.3)
M ay ‘10
Re leva n t Cou rsewo r k : Compu te r Systems A rchi tectu re, Real T i me Compu ter Systems, D igi ta l System Design –
T ools and Techn iques, Opera t i ng Systems, Advanced Topics i n M ic ro-archi tectu re, Web Technologies, Analysis of
A lgo r i t hms, MOS V LS I Ci rcu i t Design, Compu te r Networ ks
B achelo r of E lec t ron ics E ng i nee r i ng, U n iversi t y of M u mbai
J une ’08
T EC H N ICA L SK I L LS
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• L a nguages – C, C++, V H D L, • T ools – Modelsim, Xi l i nx ISE, Cadence, Wi reshar k,
Ver i log, Assembly
l evel language for x86 Processors, M IPS, Perl, O Pnet, V isual Stud io, GDB, GCC, Emacs, V i m
• M ic rop rocessors - P IC, AT ME L,
H T M L, ECMAScr ip t PowerPC,
• C i rc u i t Sim u la t ion – PSpice, Ma t lab, ePD3.0 I n tel0x86, AR M
• Ope r a t ion Systems – W indows, L i n ux, Nachos • M iscell a neous – PC I bus p ro tocol, RA I D
A CADE M IC PROJECTS
Tomasulo O u t-of-O r de r A rch i tec t u re - V e r i log, X i l i n x 10.1, J TAG, M o de lsim
S ummer ‘09
• Designed componen ts l i ke I ns t r uc t ion Fetch Un i t, D ispatch Un i t, ROB, F I FO, Issue Queues for t he Tomasulo
a rchi tectu re using Ver i log
• I mp lemen ted i t on t he Nexys2 FPGA board using X i l i nx 10.1 ISE and simu la ted using ModelSim
C ompu te r A rch i tect u re Design - V e r i log
F a l l ‘08
• Designed and simu la ted single-cycle, mu l t i-cycle and pipel i ned CPU at i ts logic level using Ver i log
Design, L ayou t an d Sim u l a t ion of a D ig i t a l Neu ron – Cade nce, SP I C E
F a l l ’09
• Bu i l t a funct ional neu ron using bui ld i ng blocks such as N A N D, NOR, XOR and D-F l ip f lop
• Crea ted a wor k i ng schemat ic and layou t of a networ k of neu rons and successful ly simu la ted using SPICE
Ope r a t i ng System Developmen t i n N achos - C, C++, Sola r is
F a l l ‘08
• I mp lemen ted concepts of ke r nel tasks l i ke t h read synch ron iza t ion, mu t ua l exclusion, system cal ls, t h read and
p rocess managemen t, schedul i ng, v i r t ua l add ress t ransla t ion, page fau l t except ions, memory managemen t,
v i r t ua l memo ry, deadlock cont rol and i n ter-p rocess commun icat ion dis t r ibu ted networ k i ng and clien t-server
a rchi tectu re
• I mp lemen ted dis t r ibu ted networ k ing using RPCs and fu l l redundan t server arch i tectu re to handle di fferen t
c lien ts
L i fe-t i me r e l i ab i l i t y of P rocessors – C, Simp leScala r
F a l l ‘09
• Analyzed and evalua ted t he effect of Negat ive B ias Tempera tu re I ns tab i l i t y on t he rel iabi l i t y of m icro-
archi tectu ra l un i ts over a per iod of t i me using ma t hemat ical models i n tegra ted w i t h SimpleScala r
• Mod i f ied t he code(in C/C++) of Simp leScalar, Ho tSpot(Tempera tu re Simu la tor) and Wat tch(Power Simu la to r) to
a dd t he requ i red funct ional i t y and i n te rfaced t hem to get a real t i me est ima te of t he change i n tempera t u re
d u r i ng benchmar k execut ion to calcu la te M T BF
A na lysis an d D esign i m p rovemen t on a n Ou t-of-O r de r P r ocessor - S imp leScalar, Rea l Est i m a tor, CAC T I
S p r i ng ’09
• Used SimpleScala r simu la t ion sof twa re to analyze t he CP I and M IPS of an out-of-order p rocessor w i t h di fferen t
conf igu ra t ions and opt im ized for perfo rmance by modify i ng cache sizes, set associa t iv i ty, i nst r uc t ion w id t h and
ALU
S ocket P rog r a m m i ng – C
S p r i ng ’09
• Simu la ted a course regis t ra t ion system using TCP and U DP sockets for commun ica t ion i n a cl ien t-server
a rchi tectu re
WORK EXPER IE NCE
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U n ive rsi t y of Sout he r n Ca l i fo r n i a - A ssistan t to t he Gradua te Adv isors
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Sept ‘08 – May ‘10
Managing course regist ra t ions, studen t da tabase, techn ical equipmen ts, da ta ent r ies and assist i ng advisors w i t h
s pecial p rojects.
A u to Con t ro ls, I n d i a - A u tomat ion I n te r n
2 007-08
• Conceptual ized and developed a m ic rocont rol ler based ci rcu i t w i t h real t i me inpu ts l i ke tempera tu re and
p ressu re to cont rol t he machine for t he manufactu re of k i tchen appl iances
• Designed a regu la ted and dual power supply to power t he ci rcu i t
L E ADERSH IP SK I L LS/ORGAN IZAT IO NS ASSOC IATED
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I . E.E.E Publ ici ty team member - S tuden t Chap ter, Un iversi ty of M u mbai
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2 004–08
Act ive member of Jumpsta r t Educat ional Movemen t, a social organ izat ion involved i n teaching
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u nde rp r i v i leged and physically chal lenged studen ts
2 004–08
Suppor ted and organized annual blood dona t ion d r ives i n college
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