Vikram Murali
**** ******* ******, *** *, La Jolla, CA - 92037 ? 619-***-**** ?
*******@****.***
QUALIFICATION SUMMARY
. Highly motivated and dynamic "Electrical and Electronics Engineer"
specializing in VLSI Digital Systems and Integrated Circuit design,
seeking a full time job in a related position
. Ability to learn quickly and complete challenging projects on time and
under budget
. Recognized for excellence in the art of technical presentation and
public speaking
EDUCATION
University of California, San Diego (UCSD)
Rajalakshmi Engineering College (REC)
M.S., Electrical and Computer Engineering,
(Affiliated to: Anna University)
Major: Electronic Circuits and Systems (VLSI)
B.E., Electrical and Electronics Engg. (EEE)
Expected: June 2011 Major GPA: 3.54
May 2009 GPA: 8.6 / 10.
Ranked 3rd
in the Department of EEE
AREAS OF EXPERTISE:
. Digital VLSI: System-on-Chip Design, RTL Design, VLSI ASIC -
Physical Design, Static Timing Analysis, Low Power VLSI design,
Computer Aided Circuit Simulation and Verification, VLSI-Test, VLSI
- Process Variations and Variation tolerance, VLSI Digital Systems
Algorithms and Architectures
. Computer Architecture
. Solid State Electronics & Device Physics
. Analog Design : CMOS Analog Integrated Circuit Design,
Communication Circuit Design
. 'Project, Business and Venture' Management
TECHNICAL SKILLS:
Toolset: Electronics / Digital design: Verilog HDL, VHDL, Cadence RTL
compiler, Synopsys Design Compiler, Cadence Encounter DSI, Synopsys
PrimeTime, Synopsys Star-RCXT, HSPICE, FPGA Programming- Altera - Quartus
II, Model Sim, Simulink, Analog Virtuoso Environment, Matlab 7.0, Active
HDL 7.2, PERL
Mechanical: ANSYS 11.0, MagNet, SRDaS, SOLIDWORKS 2009 (Basics), Finite
Element Analysis
Languages: Application Development experience in C, C++
Operating Systems: Experienced with Windows, Linux, MS-DOS platforms
INDUSTRY EXPERIENCE
Engineer Intern, Projects & Services, R&D Division, Leitwind Limited,
Vipiteno, Italy July 2010 - September 2010
. Designed Linux TCP/UDP server to process real-time turbine data and
disseminate to multiple clients
. Performed optimization according to the system topology, the place of
inception and forecast needs. Additionally innovated several parallel
processing techniques and tradeoffs with 'advanced forking', helped
obtain improved efficiency, achieving the budgeted performance
. Devised intelligent and optimized Radix 2 based algorithm for
implementing FFT (Fast Fourier Transforms) using several techniques,
with good time complexities by harnessing knowledge of the hardware
platform
ACADEMIC EXPERIENCE
Projects, MS Electronic Circuits and Systems, UCSD
September 2009 - present
. System on Chip design - Hardware Software Co-Design of 802.11
Subsystem, MAC layer-WEP Co-processor ; Design, Simulation and Layout
of 4x4 6T SRAM using Cadence IC design and Analog Virtuoso environment
; Study and Simulation of Innovative Level Converting Flip Flops
(LCFF) using SPICE ; Design of Low Power 16-Bit Adder in 32nm process
; Implementation of Aggressive scaling - Error Detection and
Correction using RAZOR ; Physical Implementation of OPENSPARC T1 Core
; Several small design projects as part of coursework in Cadence ;
Several Digital System Design Projects (Altera DE-2 Platform)
Research, MS Electronic Circuits and Systems, UCSD
September
2009 - present
. Researched and analyzed effects of Process Variations, Modeling and
Methods to combat these effects in the sub 45 nm technologies and
beyond
. Published a report on "Variation tolerant and Resilient Designs" in
fulfillment of requirements towards Research Conference, under the
guidance of Prof. Chung Kuan Cheng
. Worked as a Graduate Student Research Assistant on "Methods to solve
difficulties in generating cost-effective testing methods for Analog
cores and Analog-Digital Interfaces of Mixed Signal VLSI Circuits,
through DFT measures, examining Digital Test Access Mechanisms,
focusing on SoC Designs" with Prof. Chung Kuan Cheng
Teaching Assistant, Department of Computer Science & Engineering, UCSD
September 2010 - present
. Graduate and Undergrad coursework: VLSI - ASIC Implementation,
Digital Systems Design Laboratory, Digital System Components and
Design, CMOS Digital Integrated Circuits.
PRESENTATIONS/PUBLICATIONS (select)
. Modelling and Analysis of an SRM using ANSYS, IET Conference- 2009.
. "Floating Transponder Bluetooth, a long range Bluetooth protocol", SURGE
- 2008, Annamalai University, Chidambaram-Best Paper Award
. "Superconductors in Power Transmission" AISSMS, Engineering Today -
2007, College of Engineering, Pune -- 1st Prize among more than 100
papers
. "Renewable Energy - Fuel Cell Powered Electric Locomotives," DAMPERZ -
2007, Adhiparasakthi College
of Engineering, Kalavai, Distinguished Paper Award
. "Efficient Power Transmission -Superconductivity" PHANTASM - 2006,
Government College of Engineering, Bargur- Awarded 1st prize
. Few others include : Nanotechnology in Solar Power, Nanotechnology in
Electric Bulbs, Signaling System based on Lasers, High Efficiency
Electric/Diesel Locomotives
OTHER PROJECTS
"Electronic Fog Signaling System Using Laser Diodes and Detectors, Indian
Railways", Innovative Projects Cell, REC, May 2007
"Piezo-Electric Power Generation, Utilization", Innovative Projects Cell,
REC, May 2008
In- plant training in Electrical & Electronics divisions at JSW Limited,
Boisar, India
"Modelling and Analysis of an SRM using ANSYS, SRDaS and SolidWorks", May
2009
EXTRA-CURRICULAR ACTIVITIES
. Participated and won awards in several elocution and essay, poetry,
creative writing, painting contests. To highlight one of those awards:
The best elocutor and speaker award in an inter-college debate contest
conducted to commemorate India's 59th Independence day.
. Several poem publications in accredited sources (Hindi) - "Kacchi Mitti"
-Annual National poem publication, Agarwal Vidyalaya, Chennai ; India -
to highlight one.
. One among the finalists of the prestigious ALL INDIA REYNOLDS SCHOLARSHIP
EXAM - 2002 for academics and overall excellence.
LEADERSHIP
. Member, National Institution for Quality & Reliability, REC, Anna
University, 2007-present
. Co-Coordinator, TECHFEST 08, TECHFEST 07 (National Level Technical
Symposium), REC, 2007 -2008
. President, Interact Club, JGVV MHSS, India, 2003-2004
. Student Secretary, Ex-nora Environmental Association, JGVV HMSS,
India, 2003-2004