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Design Engineering

Location:
Round Rock, TX, 78681
Posted:
April 29, 2010

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Resume:

Alvin C. maus

*****@******.**.***

**** *** *** ******

H (512) - 218 - 9565

Round Rock, Texas 78681

C (512) - 626 - 4789

SUMMARY

IC layout designer with extensive experience in high speed CMOS IC analog

layout. Knowledge in electromigration, power supply bypass capacitor

utilization, and common-centroid matched gate implementation and noise

reduction at die level. Focused on USB 1 & 2, SATA, I/O pad sets, PLL's,

oscillators and voltage regulators. Prolific in the use of Cadence tools

(Virtuoso layout XL, Mentor Calibre LVS & DRC).

CORE COMPETENCIES

Problem Solving High Speed Analog Team Player

Electromigration Common Centroid design Design for

Floor Planning Specialty Standard Cells Manufacturability

Detail Orientated Complete I/O Pad Sets Team Lead

Stress Relief Noise Reduction; Die Noise Reduction; P/S

PROFESSIONAL EXPERIENCE

FREESCALE SEMICONDUCTOR, INC., Austin, Texas (formerly Motorola SPS) 2004-

2009

A global leader in the design and manufacture of embedded semiconductor for

the automotive, consumer, industrial and wireless industries.

High Speed Analog IC Layout Designer

. Defined problems and co-lead repair team on incomplete SATA module.

Corrected and updated module using electromigration, power supply & die

noise reduction and other analog techniques.

. Joined a design team in progress constructing over a half dozen CMOS high

voltage Mixed Signal sub modules undersized and ahead of schedule. This

allowed Layout Contractors to be both released early and to keep other

projects on or ahead of schedule.

. Rebuilt, refurbished and enhanced inherited bandgap and tempsense cells

after multiple design enhancements to include common centroid layout,

stress relief on matching gates and noise reduction techniques.

Analog IC Layout Designer

. Designed and built multiple complex padconn (USB + PLL to pad frame)

wiring cells and schematics for multiple chip designs keeping an eye on

matched wire length, electromigration requirements and bypass capacitors

on all power supplies.

. Initiated design and collaborated with engineering to design and layout

series of standalone, drop-in, and power supply bypass capacitors for

high and low voltage applications.

. Floor planned and led team of temporary contractors on construction of

USB 2.0 module. Brought it in on time and under size.

MOTOROLA INC. (Semiconductor Product Sector), Austin, Texas

1989-2004

A global leading supplier of integrated communications and embedded

electronic solutions.

IC Layout Designer & Librarian I/O pads and standard cells

. Floor planned, built, maintained and enhanced multiple I/O pad sets for

several processes over several years including original Coldfire series.

Partnered with Engineering and R&D on optimal design and integration of

ESD circuitry.

. Participated on next generation of standard cells and built specialty

cells for multiple chips including the Coldfire series.

. Made contributions to 68060 team to include a series of standard cell

power supply bypass spacer caps, a series of clock delay cells and other

specialty standard cells. Wrote standard cell manual and created a pass-

fail test matrix for DRCs.

IC Layout Designer

. Took 68340 design striped out several modules and reworked System

Integration Module to fit in smaller die. Completely reworked wiring and

pad frame to create 68330 chip.

. Made significant modifications to oscillator and System Integration

Module on 68340 and prepared design for production.

. Joined in midstream Motorola 68040 layout team. Promoted to leader of sub-

section of sub-module team. Promoted to final wiring team.

EDUCATION

A.S. in Electronic Engineering Technology:

ITT Technical Institute,

Fort Wayne, Indiana

26L20; Microwave Equipment Operation and Repair

US Army Signal Center and School,

Fort Monmouth NJ

Held Secret Clearance



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