Matt Namaky
**** ******* ***, *****, ** *****
Cell: (972) 489 - 9505
*******@*****.***
QUALIFICATIONS SUMMARY
To obtain an engineering position where my skills in semiconductor
industries provides the opportunity of solving customers' technical
difficulties and needs, as well as helping R&D and process engineers to
develop and design more robust and reliable products as well as reducing
the cost of production by resolving root cause of failures and corrective
action.
As a highly skilled professional self-motivated, team oriented, result
driven FA / Product Engineer / Yield Engineer with 10 years of experience
in yield improvement, root cause determination, failure mode analysis, and
bench testing within the semiconductor industries and manufacturing
environment my expertise are:
* Experience identifying root cause of yield loss and finding
corrective action methodologies.
* Demonstrated coordination and development of fault isolation,
failure analysis techniques, and monitoring yield and defect
density, leading to increased yield, cost saving, and product
delivery.
* Experience assisting process engineers, and test engineers
determining efficient strategy and test vectors for fault
isolation in respond to RMA and manufacturing defect, reducing
production costs and improving customer-satisfaction.
* Created and Maintained Cadence and Magma (Knights) database
serving product engineering and FA for p18 and smaller geometry
in Linux environment.
* Experienced in modifying test program for Q252 and Maverick
* Analysis of fab and device parametric data using ACE and JMP.
* Experienced in utilizing various FA tools and techniques
including, Transmission Electron Microscope, Laser Scanning
Microscopy, Emission Microscopy, Infrared Optical Beam Induced
Resistance Change (IR-OBIRCH), Digital Oscilloscopes including
Semicap laser and EMMI, Hamamatsu inverted laser and EMMI,
EMMI2000, Back Side Emission Microscopy, and high resolution
submerge lens microscope
* Familiar with chemical FA lab to encapsulation and enhanced
cleaning in FA technique and analysis
* Familiar with FIB identify/modify the circuit to help analysis.
* Familiar with SEM physically inspect the die for defects.
* Collaborated with design analyzing schematics and layout to
define the best strategy to isolate the fault and find the root
cause
* Proficient with Microsoft Office System (including Microsoft
Word, Microsoft Excel, Microsoft PowerPoint, and Microsoft
Outlook) and reporting.
EXPERIENCE
Currently:
Since 5/6/2009 that Maxim shutdown fab A, I'm actively in the job
market for engineering position and meanwhile I teach mathematics
* High school mathematics teacher in McKinney, Texas since
11/16/2009
Maxim IC (Dallas Semiconductor), Dallas, Texas
Product/ Yield Engineer for various products 12/1/1999 - 5/6/2009
Senior Product Engineer 2005 - Jun 2009
* Failure Analysis of manufacturing defects and rejects
* Enhanced Yield Improvement
* Revised minor layout changes to improve yield using Cadence
Virtuoso.
* Developed and taught training courses and manuals for PE and FA
engineers.
* Performed root-cause analysis on low yield lots implementing PT
analysis, optical inspection, layout and circuit analysis, micro
probing, SEM enhanced inspection, and fib modification.
* Created and maintained Knights database isolating faulty node in
FIB/SEM Physical FA technique.
* Experienced in modifying test program for Q252 and Maverick to
obtain device parametric data and fault isolation
* Worked with ACE and JMP data analysis software to manipulate and
represent fab and device parametric data.
Product engineer 1999 -2005
* Monitored and developed PT equivalency on various technologies.
* Driving yield enhancement and cost reduction activities.
* Analysis of Manufacturing defect and customer RMA
* Revised and improved test program.
EDUCATION:
University of Texas at Dallas, Texas
* Master of Science Dec 1999 Digital Microelectronics System
Design and Process
* Bachelor of Science May 1999 Electrical Engineering
TRAINING:
Various professional training:
* UNIX and advance Unix by Trinity River Research
* Semiconductor Technology by Technology Associate
* C++ by Execute Train
* Self taught Cadence Virtuoso
* Self taught Magma (Knights)
TOOLS AND SKILLS:
Experienced in utilizing various FA tools and techniques
including, Transmission Electron Microscope, Laser Scanning
Microscopy, Emission Microscopy, Infrared Optical Beam Induced
Resistance Change (IR-OBIRCH), Digital Oscilloscopes,
Transmission line emulator, HP 4145/4156 semiconductor
parametric analyzer, Optical Microscopy (including Con-focal and
Immersion techniques), Source meter, Power Supply, Millimeter,
Function Generator. Proficient in Microsoft products (Operating
system, office products including Word, Excel, PowerPoint,
Outlook), C++ programming, Linux Operating system, Unix
Operating System, Knights layout driven FIB software, and
Cadence Virtuoso.