Design Manager

Michael J. Hulligan

Sr. PCB Designer CID

**** ****** ***. ***.**

Huntington Beach CA 92647

abh8p6@r.postjobfree.com

Objective:

To obtain a challenging position providing design services to engineering and

manufacturing development groups as a Senior CAD Printed Circuit Board Designer.

Qualifications:

Over twenty-five years of progressive experience in the electronic design and

manufacturing environment with skills in the following:

PADS 2007.1

PADS Logic

Allegro15.5.1

Protel DXP

PCAD 8.0

EMI

Spectra

AutoCAD2006

CAM350

Blaze Router

IPC

Agile

DFT

DFM

RF

OrCAD

Management

Experience

2009 – Present

Senior PCB Designer

Technovare Systems Inc., Costa Mesa, CA

Design layout and all libraries with the uses PADS 2005 SP2, PCB physical design, parts

placement, routing, verification etc. Advanced designs for new video technology High Speed,

RF, DRAM, DFM, DFT, EMI. Verification for new internal design tools and feedback to team.

2008 – 2009

Senior PCB Designer

Insitu, Bingen, WA

Design, layout and all libraries with the uses PADS 2007. PCB physical design, parts

placement, routing, verification etc. Advanced design for Avionics Technology High Speed,

0.4mm pitch package, RF, IPC, DFM, DFT, EMI, ICT. Create design documents for FAB

and ASM with IPC guidelines for designers and the company to use.

2002 – 2008

Design Consultant – Senior PCB Designer

MH Design, Milpitas, CA

Design and layout PCBs with the use of PADS 2005, Allegro15.5.1 and Protel DXP. PCB

physical design, parts placement, routing, verification, schematic, etc. Advanced design with new

technology High Speed up to 20gbs, IPC, DFM, DFT, EMI, ICT and NASA. Verification

for new internal design tools and feedback to development team. Create design documents

for FAB and ASM drawings use the use of Auto CAD2006. I also provide training for

customers on PADS 2005.2.

2001 – 2002

Senior PCB Designer/Co-Manager

Dynamic Detail Design, L.L.C., San Jose, CA

Design, layout and all libraries for PCBs with the use of PADS 4.0.1, created Decals,

schematic capture, netlist,Gerber Data, design support documentation for FAB and ASM

of PCBs on AutoCAD, Design PCBs from a single sided board to 22 layers and Controlled Impedance.

2000 – 2001

Senior PCB Designer

Intel Corporation, Hillsboro, OR

Design and layout all PCBs with the use of Allegro 13.5, design a 12 layer board with Diff Paris,

HighSpeed, DFM, DFT, ICT, RF Technology, created documentation of FAB and ASM on AutoCAD.

1998 – 2000

Senior PCB Designer

Design Plus INC., San Jose, CA

Design, layout and create libraries for PCBs with the use of PADS 3.6, create Decals, schematic

capture, netlist, Gerber Data, design PCBs from a 2 to 18 layers.

1992 – 1998

Senior PCB Designer

Meyer Sound Laboratory, Berkley, CA

Design and layout PCBs with the use of PCAD and Protel, create symbols, schematic capture,

netlist, Gerber Data, design support documentation for FAB and ASM of PCBs on AutoCAD.

Education:

Certificate in IPC Standards/Workshop for CID, San Diego, CA - 2006,

Certificate in Valid Logic Systems, Beaverton, OR – 2000

Masters Institute, San Jose, CA - 1987

References Available upon request

Contact this candidate