Post Job Free
Sign in

Design Engineer

Location:
Simi Valley, CA, 93063
Posted:
November 05, 2010

Contact this candidate

Resume:

Lawrence M. Chin

**** ******** *****

Simi Valley, CA 93063

805-***-**** - abh8hv@r.postjobfree.com

SUMMARY

. Designed digital/analog circuits with devices ranging from transistors

to complex ICs.

. Designed electronics with

- FPGAs, CPLDs using VHDL and schematic capture.

- Operational amplifiers, microprocessors (8085, 8048, 8X305,

80386EX), voltage regulators, analog to digital / digital to analog

converters.

. Designed hardware and firmware for embedded systems .

. EDA tool experience includes Synopsys FPGA Compiler, Actel Designer,

Lattice ISP, Xilinx ISE, Cadence PSpice, and Mentor Graphics Modelsim.

PROFESSIONAL EXPERIENCE

Sr. Project Engineer, Northrop Grumman Aerospace Systems, Redondo Beach,

CA 1996 - 2009

Responsibilities included electronic design and analysis. Tasks included

the following:

- Unit Design

- cPCI based processing unit design that interfaced to analog and

digital assemblies for a laser communications program.

- Laser alignment unit electronics design based on Texas Instruments

320C31 DSP. Designed 2 Lattice 1048C CPLDs (10K gate design each,

VHDL).

- Board Design

- Radiation Hardened Sensor board design for transmitting pixel

information from Short Wave Infrared and Very Near Infrared sensors

to spacecraft data recorder. Designed Actel RH1280 FPGA (5K gate

design, schematic). Spacecraft electronics successfully launched

and functioning.

- Serial Link ISA Board and CPLD (ispLSI3160, 5K gate design, VHDL)

design for Astrolink satellite program. Board components include

voltage regulators and RS422 driver/receivers.

- FPGA Design

- FPGA design (Actel RT54SX32S, 20K gate design, VHDL) for Advanced

Extremely High Frequency (AEHF) satellite payload. Functions

include Phase Lock Loop (PLL) status discrete monitoring, Relay and

Analog telemetry collection, Relay Hybrid Driver control, MIL-STD-

1553B Hybrid interface, and Dual Port RAM control.

- FPGA design (Actel RT54SX16, 11K gate design, VHDL) for Integrated

Avionics program. Interfaced to Temic TSC21020F DSP microprocessor.

Designed Pulse Width Modulation functions and an Intel 8255

Programmable Peripheral Interface.

- Projectile controller logic design based on Lattice 3320 CPLD (10K

gate design, VHDL).

- Porting of ASIC design to Xilinx Virtex FPGA running at 160 MHz.

- ASIC Design (Front End)

- ASIC design (VHDL) for use in Integrated Avionics program.

Functions include interfacing to Dual Port Memory, UART, and an

Intellectual Property for MIL-STD-1553B functions. Connected to the

IBM On-Chip Peripheral Bus. Dual Port memory and UART were Synopsys

Designware parts.

- Design Analysis

- Worst Case system/unit/board design review; checked electrical,

timing, and signal integrity, etc, resulting in unit recall and

design corrections in a cryo-cooler controller electronics board.

- Investigation of intermittent failures in another organization's

PLL controller, resulting in discovery and a report of a FPGA

design defect due to VHDL coding error.

Lawrence M. Chin

3009 Rockgate Place

Simi Valley, CA 93063

805-***-****

Contract Engineer, CDI Corporation, Northridge, CA

1995 - 1996

Assigned to Datametrics Corp., a manufacturer of high-end color printers.

Designed

- Six CPLDs running at 25MHZ in Altera Hardware Description Language

(AHDL). Used MAXPLUS+II software for synthesizing and simulating

logic. FPGAs controlled nib data flow from rasterizer to printhead,

interfacing with synchronous FIFOs and synchronous RAMs. CPLDs were

16,000 gate Altera EPF81500As with typical gate utilization of 60%.

- CPLD decoding shaft encoders and interfacing position and velocity

information to TI 320C25 DSP processors for positioning and velocity

control applications.

Senior Engineer, Whittaker Electronic Systems, Simi Valley, CA

1994 - 1995

- Designed INTEL 80386EX based Control Processor board with Flash

memory, PCMCIA ATA Flash drives, keypad, alphanumeric displays, and

MIL-STD-1553B bus communications module for SHORTSTOP program. Logic

was synthesized in a XILINX 4005A FPGA. Captured schematics with ORCAD

software.

Research Scientist, Teledyne Electronic Systems, Northridge, CA

1982 - 1994

- Designed a series of communications boards and firmware based on

several specifications including MIL-STD-1553B for several avionics

systems.

- Led a multi-disciplinary engineering team to create a microprocessor

based test device to verify operation of a space-qualified computer.

- Conducted analyses to ascertain design survivability under extreme

environmental conditions and determined appropriate solutions when

required.

- Extensively used Programmable Logic Devices in order to reduce real

estate.

- Resolved system failures caused by faulty components, design, or

manufacturing problems.

- Provided design review presentation and product support for customers.

Engineering Specialist, Litton Data Systems, Van Nuys, CA

1980 - 1982

- Designed hardware and embedded software for micro-controller based

voice processing module for use in a digital voice switching system as

part of a communications network. Design used INTEL 8748

microcontroller and INTEL 2910 CODECs.

Positions prior to 1980 available upon request

EDUCATION

BSEE with honors, MSEE, Northeastern University, Boston, MA, 1975, Member

of Tau Beta Pi (National Engineering Honors Society)



Contact this candidate