Engineer Development

KEVIN HUNG

**** ****** *****

Austin, TX *****

512-***-**** (Cell)

*******@*****.***

EXPERIENCE

Silicon Laboratories Inc, Austin, TX July 2010 – Present

Senior DSP Firmware Engineer

Highly Integrated Single-Chip AM/FM Radio Tuner

• Reverse engineering of fixed-point C and assembly code for in-house DSP core. Reverse engineering of

timing interaction between MCU core and DSP core.

• Optimization of Farrow filter for Asynchronous Sampling Rate Converter.

• Debugging of DSP blocks (e.g. AM/FM noise blanker and IQ Imbalance) in embedded environment.

• Reduction of AGC pop noise for different analog hardware architectures.

Wimatek Systems Inc, Vancouver, BC June 2010 – July 2010

Senior DSP Development Engineer

LTE Physical Layer Development

• Consultant for LTE baseband development.

EyeHawk Technologies, New Westminster, BC February 2010 – May 2010

Senior DSP Engineer

3D Camera

• Developed 3D stereo image alignment algorithm using Matlab.

• Developed 3D vergence control algorithm using Matlab. To be patented.

• Implementation using Texas Instruments OMAP 3530 processor: Interface to FPGA, DMA transfer.

Dyaptive Systems Inc, Vancouver, BC June 2005 – February 2010

Senior DSP Engineer

WCDMA Physical Layer Firmware for Load Testing (1 year)

• Design and implementation of optimized embedded C code of decoder algorithms on TI C6416 fixed-point

DSP: WCDMA indicator channel decoding, WCDMA rate dematching, entire HSDPA decoding chain

(both HS-SCCH and HS-DSCH). Use of TI C intrinsics and special pragmas for speed optimization.

• Automated test using GPIB, lab debugging using spectrum analyzer and wireless protocol test set.

EVDO Physical Layer Firmware for Load Testing (2 years)

• Matlab modeling of both forward and reverse channel data paths for Subtype 0, 1 and 2.

• Design and implementation of (embedded C) reverse link flow control and scheduling of transmissions of

various reverse channels (e.g. data channel, DRC, DSC and ACK channel).

• Optimized DSP C code to have one DSP function as 114 EVDO cell phones for load testing purpose.

• Managed multiple DSP releases/branches for integration with other teams.

• Remote debugging of system issues (at customer site) such as closed-loop power control and DSP stability

problems.

• Initiated and implemented use of PCLint for static analysis of the DSP C code.

LTE Physical Layer Firmware for Load Testing (2 years)

• Lead a DSP team for the firmware development of LTE physical layer using TI C6455 fixed-point DSP.

• Performed high-level architecture design for DSP C code and interface requirements with higher layer

software.

• Performed code review and design document review.

• Ensured that design procedures and coding standards were followed.

• Provided weekly status report for team progress, issues and schedule changes.

• Mentored new graduate and co-op student.

• Design and implementation of DCI blind detection in DSP C code.

• Debugged low-level FPGA interface problems.

• Used Python and SWIG to perform regression tests.

• Configured L1/L2 cache.

• Configured and debugged EDMA transfers.

Datum Telegraphic Inc. (acquired by PMC-Sierra - July 2000), Vancouver, BC Oct 1998 – June 2005

DSP Design Engineer

Power Amplifier Linearization for 20MHz Wideband Transmission (4 years)

• Characterized nonlinearity and thermal effect of cellular basestation class AB power amplifier.

• Research and Matlab development of adaptive digital predistortion for 15 MHz signal bandwidth. Achieve

-60 dBc out-of-band distortion and 15% efficiency.

• Research and Matlab development of adaptive digital circuit for correcting IQ imbalance and DC offset in

analog quadrature modulator.

• Matlab implementation and debugging of adaptation algorithms such as Least Mean Squares, Recursive

Least Squares and Least Squares with filtered error signal.

• Investigated performance of crest-factor reduction algorithm in Matlab.

• Performed WCDMA standard compliant measurements, such as adjacent channel leakage ratio (ACLR)

and error vector magnitude (EVM).

Serial Attached SCSI (SAS) Expander Chip Verification (6 months)

• Simulation development using Specman E for chip verification.

Serial Attached SCSI (SAS) Expander Firmware (2.5 years)

• Firmware development and low-level debugging of serial GPIO protocol using oscilloscope and logic

analyzer.

• Used real-time operating system ThreadX.

• Embedded C programming of MIPS processor of SATA port selector and SAS retimer using ROM-based

ASIC.

• Used Tcl to perform automated regression tests.

Glenayre Technologies, Vancouver, BC June 1996 - Oct 1998

DSP Communications Engineer (Advanced Development Group)

Two-way Paging Basestation Receiver

• Feature upgrade of assembly code on Analog Device fixed-point 2181 DSP.

• ReFLEX-25 physical layer firmware development on TI floating-point C32 DSP in C.

• Investigation of Constant Modulus Algorithm for ReFLEX-25 receiver.

EDUCATION

MSEE, University of Calgary, June 1997, GPA: 3.9/4.0

Thesis: A Novel Low-Complexity IF-Sampling Receiver

BSEE (with Distinction), University of Alberta, June 1994, GPA: 8.7/9.0 (3.8/4.0)

SKILLS

Lab equipment: Vector signal analyzer, spectrum analyzer, Agilent 8960 Wireless Communications Test Set

Operating Systems: Unix (SunOS), Linux, Windows and ThreadX

Computer languages: Matlab, C, Assembly (TI and Analog Device DSPs), Expect, Tcl

Tools: SVN, TI Code Composer Studio IDE

PATENTS

• Andrew S. Wright, Chun Yeung Kevin Hung, et. al., “Wideband Digital Predistortion Linearizer For

Nonlinear Amplifiers,” Patent # US 6,798,843 B1, September 28, 2004.

• Andrew S. Wright, Chun Yeung Kevin Hung, et. al., “Transmission Antenna Array System With

Predistortion,” Patent # US 6,697,436 B1, February 24, 2004.

• Andrew S. Wright, Chun Yeung Kevin Hung, et. al., “Digital Predistortion Methods For Wideband

Amplifiers,” Patent # US 6,587,514 B1, July 1, 2003.

• Andrew S. Wright, Chun Yeung Kevin Hung, et. al., “Amplifier Measurement And Modeling Processes

For Use In Generating Predistortion Parameters,” Patent # US 6,476,670 B2, US 6,459,334 B2, US

6,388,513 B1, US 6,356,146 B1, March 12, 2002 to November 5, 2002.

• Andrew S. Wright, Chun Yeung Kevin Hung, et. al., “Predistortion Amplifier System With Separately

Controllable Amplifiers,” Patent # US 6,342,810 B1, January 29, 2002.

• Kevin Lochart Rodger, Chun Yeung Kevin Hung, et. al., “Systems And Methods For Jitter Analysis Of

Digital Signals,” Patent # US 7,388,937, June 17, 2008.

CITIZENSHIP

Canadian

References Available Upon request

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