Design Engineering

PRAVEEN SRINIVASAN

****, ********* *******, *** # ****, Richardson, TX 75080 ? Phone: 864-517-

****, 972-***-****, +91-44-

****-****

***********@*****.***, *********@********.***

OBJECTIVE

To obtain an Internship to hone my skills further in order to be able to

contribute effectively towards the Company's goals.

EDUCATION

. MS-Electrical Engineering, The University of Texas at Dallas. May,

2012 GPA: 3.22

. B.E. Electronics and Instrumentation Engineering, May 2010

Anna University, India.

TECHNICAL SKILLS

. Tools Used: Design vision, Simvision, Hspice, Tetramax, Modelsim,

Xilinx, Cadence, Encounter, Primetime, Pathmill, Selec-ladder, AWR,

Cplex, NS2, Matlab

. Hardware description Languages: VHDL, Verilog, PLC ladder logic

. Programming languages: C, C++, shell-scripting, Perl, OTcl

. Web Design: HTML, XML, JavaScript

. Multimedia & Design Tools: Adobe Photoshop, Adobe Flash Professional

. OS Platforms: Windows 9X, Windows 2000, Windows XP, Windows Vista,

Windows 7, Sun Solaris, Unix, Linux

ACQUIRED SKILLS

. Building a chip from scratch, testing and simulating its functionality

. Creative thinking and coming up with innovative ideas

. Ability to work under pressure.

. Negotiation skills for effective team management in my project team.

. Expertise in problem-solving.

RELEVANT COURSES

. VLSI Design, Hardware Modeling using HDL, Testing And Testable Design,

Advanced Digital Logic, RF And Microwave Systems Engineering, Wireless

Sensor Networks and RFID, Electronic Circuits, Control and Automation,

Computer Networks and distributed control systems

PROJECTS/RESEARCH

16 bit alu design

. Designed and simulated a 16 bit alu chip from scratch capable of

performing 15 different operations-involved writing Verilog code, cell

library design (based on IBM 90 nm technology), layout and schematic

design, hspice simulation and placement and auto-routing of cells

. Bus architecture based on AMBA AHB protocol for central resources

sharing

Designed and developed verilog code for the priority arbiter, central

multiplexor interconnecting scheme, central decoder and read and write

data mux for an AMBA AHB bus architecture. Simulation, Synthesis and

Place and Route were done using Xilinx ISE design suite.

FIR filter design

. Designed and simulated 3 different versions of FIR filter design-

coding done in VHDL. These included a pipelined version of FIR filter,

a MAC implementation, and the regular implementation

Automated registration of sports equipment using rfid based comet card

. Developed and simulated a system which provides a way for automatic

registration and tracking of sport equipment. The 1.2 GHz and a 5.8GHz

channels were simulated in AWR and nominal and worst case analysis of

essential parameters were obtained along with the yield analysis

results.

Wireless Sensor Motes for monitoring vital parameters of human body

. Designed and simulated a body area network comprising 10 wireless

sensor nodes with appropriate battery model, energy and power

constraints provided using NS2. The script was written in Object

Oriented Tcl. The purpose of these nodes is to send information about

heart rate, insulin levels and obtain the ECG and EEG of the patient

and send it to a base station which is connected to a central server.

PLC based spot welding automation using ladder logic programming

. Developed a spot welding robot whose spot welding action is controlled

by a programmable logic controller. Ladder logic programming was done

in selec ladder software.

INTERN

Bharat Electronics Limited

. Learnt about advanced electronic equipment manufactured by BEL

. Exposed to different types of radars and optoelectronic devices

PAPER

. Multi-parameter Sensor Design using memristors-A memory resistive

device is known as a memristor. Envisioned a bunch of memristive cells

that could go into the making of a sensor that detects pressure,

temperature and flow

ACHIEVEMENTS

. Stood third in my department in college in undergraduate studies

. Got first prize in national technical symposium in India

AVAILABILITY Fall 2011

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