Design Signal Processing

OBJECTIVE

Seeking an Internship to exhibit my academic and professional skills,

ability to analyze complex engineering problems, evaluate and recommend

alternatives for the growth and success of the firm.

EDUCATION

Master of Science in Electrical Engineering, San Diego State University,

CA. Expected Graduation Date: Dec 2011

Bachelor of Engineering in Electrical Engineering, Anna University, INDIA.

Aug 2003-Apr 2007

SUMMARY

> Experience in Digital Signal Processing, Design of Filters, Image and

Video processing, FPGA design.

> Working knowledge of standards/technologies like CDMA, OFDM, SC-FDMA,

GSM, 802.11 (a/b/g/e/n), MPEG, JPEG, JPEG2000, H.264, LTE.

> RTL coding using VHDL and writing test benches, schematic design &

layout of digital circuits

> In depth knowledge of Computer/Processor architecture, RISC type

architecture, Wireless Communication and Networking

> Protocols: TCP /IP, UDP, HTTP, Ethernet, WiMax.

> Test/Lab equipment: Oscilloscope, Signal Generator, AC and DC source,

multimeters, Network analyzer etc.

> Programming in C,C++ and PERL.

> Excellent problem solving, debugging,analytical and communication

skills

SKILLS

Simulation Tools : AutoCAD, Pro-E, MATLAB,

OPNET, ModelSim, Xilinx ISE

Scripting Language : PERL

Programming Languages : VHDL, C++

Assembly level Languages : Microprocessor 8085, 8086,

Microcontroller 8051

MS OFFICE Tools : MS WORD, EXCEL, POWERPOINT,

ACCESS.

Operating System : Windows 2k/XP, Vista, 7.

RESEARCH

Thesis Title: Performance Enhancement of SC-FDMA

Thesis Advisor: Dr. Fred Harris Ph.D. (Aalborg University)

Single carrier frequency division multiple access (SCFDMA) which utilizes

single carrier modulation at the

transmitter and frequency domain equalization at the receiver is built.SC-

FDMA modulation techniques will be implemented in an effort to improve the

performance of SC-FDMA. Peak-average-power ratio to transmit the signal is

calculated. This result will be compared with that of OFDM. Simulation is

performed using MATLAB.

ACADEMIC PROJECTS

. Design of 8QAM and 16QAM OFDM based Modem

-Oct 2007

Various timing, phase synchronization and equalization techniques

were applied to QPSK and QAM modulated signals. At the modulator end,

the input data was modulated and passed through a shaping filter. The

demodulator has an Equalizer to negate channel effects, a detector and

a matched filter to detect the transmitted data. Used the decision

directed LMS algorithm to equalize the channel. The results are

verified by using Eye diagram and Constellation diagrams. Simulation

was done using MATLAB.

. Design of filters using MATLAB

- Mar 2008

> Designed FIR filters, CIC Decimation and Interpolation filters

in MATLAB and applied the filter in DSP to improve the incoming

signals that were corrupted by noises such as Gaussian and

impulse noises.

> Designed a FIR, IIR filter, plotted their frequency magnitude

spectrum, convolved the signal with the filter and plotted the

amplitude of the filtered signal using MATLAB. Designed

polyphase FIR quantized filter bank that partition input signals

into separate frequency channels using MATLAB.

. JPEG Image Compression using MATLAB

- Aug 2008

Implemented a DCT-based still image compression scheme similar to the

JPEG standard. On the transmitter end, the given image is first 4:2:0

subsampled, then passed through a DCT block, quantized and then

encoded. The reverse process was implemented at the receiver

. MPEG Video encoder-decoder- A basic MPEG Video encoder-decoder is

developed in MATLAB to transmit and receive a video. Motion estimation

and motion compensation algorithms like Exhaustive search and

Conjugate block matching are implemented. Motion vectors are plotted.

Reconstructed and Original video frame images are compared, error

image is constructed

. Packet and Circuit Switching using OPNET.

- Aug 2008

Analyzed the OPNET IP Network model simulation results to optimize the

network routing & switching performance. Different specifications were

applied and compared to improve the performance of the network.

. Layout design and transistor level simulation of CMOS circuits

- Mar 2009

Generated layout for 4:1 MUX using transmission gates. Perimeter and

area of diffusion region is measured. The procedure is repeated with

connecting an inverter and tri-state inverters as load. Transistor

level schematic of inverters is generated. DC and transient analysis

of inverters is performed and logic threshold is determined.

Transistor level schematic of 4:1 MUX is also built and propagation

delays, rise times and fall times are observed.

. Design of 16-bit RISC processor

- Oct 2009

16 bit multiply and divide subroutines are implemented in VHDL.

Complex blocks like memories, registers, and control logic had been

modeled using behavioral approach, whereas simple blocks i.e. adders

and arithmetic logic unit have been implemented using structural

approach. Test bench is written to check the working of processor.

Simulation of design was done using Xilinx and ModelSim.

RELEVANT COURSES

Digital Signal Processing Multirate Signal Processing

Adaptive Algorithms Modem Design

Wireless Multimedia Networks Multimedia Communications

VLSI Circuit Design VLSI System Design

Digital Systems VLSI Integrated Circuits

Microprocessor and Applications Solid State Drives

Computer architecture and networks Control Systems

Power System Analysis Instrumentation Engineering

ACTIVITIES AND ACHIEVEMENTS

. The youngest person in the World to finish the 8th grade in Piano from

Trinity College of Music, London at the age of 13.

. The EEE Department Secretary of the DMI College of Engineering during

2006-07.

. Led the Indian Cultural Team to Istanbul, Turkey for the International

Children's Festival in 1994.

. Secretary of the Indian Association in San Diego State University

during Apr 2008-10.

REFERENCES

Reference available upon request.

Contact this candidate