research associate in patents, prior art, claim charting, drafting

O BJECTIVE

Venkata Praveen Kumar S

To attain expertise in the field of intellectual property, especially patents,

and utilize my skills to help organizations create and protect technology.

E DUCATION

2009(Jan)-2010(Dec), M.E (Embedded Systems), BITS, Pilani

CGPA: 7.52/10

2004-2008, B-Tech (Electronics and Instrumentation), VIT University,

Vellore

CGPA: 7.35/10

W ORK E XPERIENCE

January, 2012 - Present, Research Associate

Evalueserve, Gurgaon

Worked on

Patent Infringement analysis

Prior art search (Invalidation, Freedom to Operate, Patentability)

Patent Portfolio analysis, landscapes and analytics

February, 2011 - September, 2011, Senior Research Fellow

VIT University, Vellore

Responsible for Control & Instrumentation in the pilot plant (Selection

of sensors, identification of the requirements of control system)

Worked on debugging electrical and control problems in Solar dish

stirling engine.

July, 2010 - December, 2010, Intern

CSIO, Chandigarh

Feasibility of thermal sensors in railway coaches

Worked on Implementing a 1-wire master using a parallel port in

Matlab.

Developed the code for cyclic redundancy checks to verify information

integrity and devised a signaling pattern from the parallel port of a

computer to communicate with a 1-wire sensor. A Graphical User

Interface using VB.Net was also developed to make the application

user friendly.

S KILL S ET

Software Lanugage: C

Hardware Language: Verilog HDL

TOOLS

MATLAB (Image processing, GUI’s, Parallel port programming),

RSLOGIX500, XilinxISE, QuartusII, Microsoft Excel 2007

M AJOR PROJECTS D URING A CADEMICS

Temperature control for an incubator - Jul 2010

YCbCr to RGB converter -Jul 2010

Implementation of the research paper “A condition based preventive

maintenance arrangement for thermal power plants, S.K.Yang”- Dec 2009

Vision Based Collision Avoidance System in Matlab - August 2007

Flat no.303, Sri Matrusai Residency,

2nd cross street, Netaji Nagar, M AJOR C OURSES

Podalakur Road, Nellore-524004, Graduate Level: Programmable Logic Controllers (chosen in the

Andhra Pradesh, India. Professional Practice course), Reconfigurable Computing, Data

Compression, Systems specification and modeling, Real Time systems,

Digital Signal Processing, Hardware software co-design.

Date of Birth: 29/08/1987 Undergraduate Level: Digital Design with HDL, Embedded Systems, Image

Phone: +91-991******* processing, Process control, Computer control of process.

E-mail: **************@*****.***

C O- CURRICULAR ACTIVITIES

Venkata Praveen Kumar S

Presented a poster “Automatic thyristorised control of any electrical load

from a remote area” at the 2nd Annual session of the Students’ Indian

Chemical Engineering Congress held at JNTU, Anantapur.

Undergone 6 weeks of in-plant training at BHEL, Hyderabad (Gas Turbine

Instrumentation) and BHEL, Ranipet (Power plant Basics)

E XTRA- C URRICULAR A CTIVITIES A ND V OLUNTEER W ORK

Holder of the Form-III certificate issued by Indian Universities to

meritorious sportspersons.

Represented VIT UNIVERSITY at the ALL-INDIA INTER UNIVERSITY CHESS

CHAMPIONSHIP held at CSJM University, Kanpur in 2008.

Represented BITS,Pilani Chess team at BOSM-09 the annual games event

held at BITS,Pilani.

Conducted Information sessions on education at BITS,Pilani for High School

students as part of the Lets promote BITS-pilani program, an initiative of

BITSAA.

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