Engineer Software

SAMUEL C. STEWART

phone: C: 843-***-**** H: 908-***-****

email: ***********@*****.***

*** ********* ***., ****** ******, NJ 07076

EXPERTISE

Project Manager & Electrical/Electronic Design Engineer, expert Verilog RTL designer, software (C, firmware, DSP),

telecommunications protocols, SERDES, DDR_SDRAM PHY’s, printed circuit boards, power supplies, analog.

HOBBIES

I build personal computers, automobile mechanic, bicycling, fishing, tennis.

EDUCATION

December University Of South Carolina, Columbia, South Carolina 29208.

1982 Received Master Of Electrical Engineering in December 1982.

Work towards this degree encompassed the fields of analog and digital semiconductors, communications,

computer architectures, and software engineering.

1974- University Of South Carolina, Columbia, South Carolina 29208.

1978 Received Bachelor of Science Electrical Engineering in May 1978.

Graduated Cum Laude with 3.62 out of 4.00 final grade point average

WORK HISTORY

May 2001 eSilicon Corporation, 890 Mountain Avenue, Murray Hill, NJ 07974

- present Employed as the Chief Architect. eSilicon is a full-service fabless ASIC supplier. We accept spec, netlist, or

COT (Customer Owned Tooling) handoff from the customer, and deliver packaged tested ASIC’s. My job is

to manage a team of engineers that perform the following duties:

a. design various portions of the ASIC using Verilog, Laker (schematic capture), and other tools. A

significant amount of this effort involves three areas:

- communication subsystems on the ASIC for off-chip communications; e.g. SERDES, Ethernet,

USB, LVDS, DDR2/3/4 SDRAM controllers & PHYs, and the various associated protocols.

- ARM CPU subsystems; e.g. ARM926E, Cortex series.

- PLL & DLL customized IP (intellectual property)

b. design boards for testing the devices (ATE loadboards, and specialized application boards that

interface to personal computers, including the software running on the PC)

c. work with the ATE guys to specify procedures and data acquisition, and supervise these activities to

bring up the test flow.

In addition, I have the following duties:

a. work with customers to make sales and develop various solutions

b. called on regularly to either resolve difficult technical problems or manage a team to resolve these

problems.

c. write Technical Reference Manuals (TRM) to document designs and procedures.

Jan 1999 AT&T Shannon Laboratories, 180 Park Ave., Florham Park, NJ 07932.

- May 2001 Employed as a System, Software, & Logic Design Engineer working in AT&T Research.

1. I worked at the system level on a telephony switch incorporating an IDT ATM chip set. This chip set

includes the IDT 77V400 switching memory along with the IDT 77V500 memory controller. A low cost

1.24 Gbps non-blocking eight-port switch may be built from these two devices plus a RISC switch

manager (provides 8 input ports plus 8 output ports). Larger switches may be built by cascading multiple

pairs; e.g. 64 inputs plus 64 outputs may be derived with 8 input pairs plus 8 output pairs (for a total of 16

V400s plus 16 V500s). I was involved in porting of the Harris & Jeffries (H&J) software signaling stack

to the chip set (a huge effort involving massive volumes of signaling protocols), as well as analyzing

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Samuel C. Stewart

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hardware changes to a circuit board in the switch.

2. I designed an “audio end-point” circuit board incorporating the IDT-79RC32355 MIPS processor. This

SOC processor was designed in our group and marketed by IDT Semiconductor. The circuit board is a

very high quality audio board that incorporates the processor along with 8 channels of 192ksps ADC, 8

channels of 192ksps DAC, 10/100 Ethernet, plus a power supply in a small enclosure. This research effort

was intended to demonstrate the use of Ethernet to stream audio and video to any location equipped with a

RJ45. I wrote the Verilog RTL for the FPGA (Altera EPM7512AE-7.5), plus designed the 19 pages of

board schematics (11x17 format), and worked on the firmware.

Sept 1995 Ariel Corp., 2540 Route 130, Cranbury, NJ 08512.

- Jan 1999 Director of Computer Telephony Product Engineering. Responsible for managing the development of:

1. CTI Modem product consisting of a PC backplane + DC5 boards (16 DSP3207 / board). This product was

sold to TNS in volume and accounted for 40% of all credit card transactions in the US.

2. DSPX27 DSP ASIC. This DSP is compatible with and 7x the throughput of the AT&T DSP3210 DSP.

3. Managed the TLM ASIC development effort. This ASIC allows up to four X27’s to be connected

together as a subsystem.

July 1990- AT&T Bell Laboratories, Room 3C541, 600 Mountain Ave., Murray Hill, NJ 07974-0636.

Sept 1995 Employed as a VCOS (Visible Caching Operating System) Software, ASIC, and PCB design Engineer.

VCOS is the real-time OS for the AT&T DSP3210 DSP processor.

Oct 1989- SCS Telecom Inc., Victoria Plaza Bldg. 3, 615 Hope Road, Eatontown, NJ 07724.

June 1990 Employed as a Contract Software Engineer on the US Army DEB-IV (Digital European Backbone) project,

June 1989- IBM Corporation, Thomas J. Watson Research Center, Yorktown Heights, NY.

Oct 1989 Employed as a Contract Software Engineer. Worked on a robotic control application utilizing an IBM 7560

robot and an IBM Fine Positioner end effector for the manufacture of printed wiring boards (5 to 35 layers,

10 um traces).

Nov. 1988- Telecommunications Techniques Corporation, 20410 Observation Drive, Germantown, MD

April 1989 20874.

Employed as a Contract Software Engineer. Work involved real-time firmware development in C language

and assembly language for TTC’s telecommunications test equipment.

June 1988- Texcom Inc., 4200 Forbes Blvd., Lanham, Maryland 20706.

Nov. 1988 Employed as a contract Electronic Engineer. Work involved development of the DNVT (Digital Nonsecure

Voice Telephone) Emulator for the US Army CTASC-II contract.

June 1987- Gould Ocean Systems Division, 6511 Baymeadow Drive, Glen Burnie, Maryland 21061.

May 1988 Employed as a Principal Engineer in the Speech Processing Group. Duties included approximately 50%

assembly language software coding and 50% processor hardware design.

Sept 1986- KEE Incorporated, 10727 Tucker Street, Beltsville, Maryland 20705.

March 1987 Employed as a hardware/software design engineer for broadband 802.3 LAN communications products.

May 1985- Litton Amecom, 5115 Calvert Road, College Park, Maryland 20740.

Sept 1986 Employed as a hardware/software engineer on the multilevel-secure LAN project and the FAA ICSS project.

August 1983- TRW Corporation, One Space Park, Redondo Beach, California 90278.

May 1985 Employed as a design and development engineer for secure LAN systems, as an an analyst on the real-time

system development of the MX missile silo control system (PDP-11/70 computer), and with ESG as a

hardware design engineer on the Input/Output Expander of the Milstar satellite payload.

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Samuel C. Stewart

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July 1982- NCR Corporation, Systems Engineering Retail Division, Atlanta, Georgia.

August 1983 Employed as a design and development engineer for microprocessor (I8085, MC6803, MC68000) based cash

register systems..

April 1981- Warner Robins Air Logistics Center, Robins AFB, Georgia.

July 1982 Employed as a GS-9 Electronic Engineer. Work involved ATE (Automatic Test Equipment) software

development for Genrad and RCA ATE testers for testing avionics aboard the E3-A AWACS airplane.

Work was approximately 30% digital hardware and interface controller design, and 70% software

development with the ATLAS ATE test language.

Summer Carolina Power & Light Co., H.B. Robinson Nuclear Steam Electric Generating Plant,

of 1978 Hartsville, S.C.

& 1979 Employed as an Assistant Engineer. This is a Pressurized Water Reactor (PWR) and produces approximately

768 MWe, and has three closed loops:

1. High pressure and high temperature water from the core to the steam generator.

2. Steam from the steam generators to the turbine, and then to the condenser primary.

3. Water from the lake to the condenser secondary for condensing the turbine exhaust steam.

Duties involved analysis and modification of plant electronic Instrument & Control subsystems and

documentation of changes.

PROFESSIONAL

ASSOCIATIONS

IEEE, Phi Beta Kappa.

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