Design Electrical

*** * ** ******, *** C, Rolla, MO ***** 1-314-***-**** *****@***.***

Raja Santosh Akella

http://www.linkedin.com/in/rajasantoshakella

OBJECTIVE

To obtain co-op in the field of Electrical Engineering.

EDUCATION

Master of Science in Electrical and Computer Engineering

Missouri University of Science & Technology Aug '12- May '14, GPA: 3.83/4.0

Bachelor of Technology in Electronics and Instrumentation Engineering

Jawaharlal Nehru Technological University Sept '08-May '12, GPA: 4.0/4.0

COURSEWORK

Advanced PLC, Linear Control Systems, Digital Control, Electric Drive Systems, Power Electronics, Interference Control in

Electronic Systems, Signal Integrity High Speed digital and RF design lab, Advanced VLSI, Process Control (Jan '14).

COMPUTER SKILLS

C, C #, Java, HTML, MATLAB, SIMULINK, PLECS, Verilog, VHDL, Cadence Virtuoso, Power World, PSCAD, MS Office, MathCAD, Altium

Designer, Eagle PCB design.

INDUSTRY EXPERIENCE

Electrical Engineering Intern, MTS Systems Corporation (EP, MN) May '13 to Aug '13

Used CAN bus to obtain information between MTS power electronic board and MTS controller. Also, worked on the

establishment of new EtherCAT communication channel between the same.

Configured Hilscher COMX100, CIFX50 using SYCON.net and used SIMULINK coder for programming TI DSP, FPGA

and C # to obtain easy information from CAN bus.

Worked on Small Signal Interrupt timing of DSP using SIMULINK and C. Also, designed layout using Eagle and tested

PCB boards to reduce common mode signal.

PROJECTS

Advanced PLC

Dr. Erickson Aug '13- Present

Establish Communication network between PLC's (ControlLogix, PLC-5) and currently working on system simulation &

checkout. In the near future, will be working on real -time project and integrate HMI with PLC. Also, other IEC languages

and factory communications.

ESD Locator System Jan '13 to May '13

Signal Integrity, High Speed digital and RF design lab, Dr. Pommerenke

Designed high speed ADC board, trigger circuit and power circuit board for ESD locator system to locate the origin of ESD

pulses using antenna method.

Used Altium designer for schematic and layout design of PCB. Soldered the PCB boards with various IC's, 0805, 0603, 0402

SMD and tested them using Network analyzer, Oscilloscopes.

Jan '13 to May '13

Faster than Clock Receiver in 0.5um technology

Advanced VLSI, Dr. Beetner

Designed faster than clock receiver using Cadence Virtuoso capable of receiving 1 bit every 2 FO4 delays (i.e. 4 bits/ clock)

by designing differential input receiver/sampler, 12 -input multiplexor, Edge detector and hold circuitry in transistor level.

Phase locked loop in 0.5um technology Jan '13 to May '13

Advanced VLSI, Dr. Beetner

Designed phase locked loop to generate 12 clock signals for faster than clock receiver by designing phase frequency detector,

charge pump, voltage controlled oscillator, divide by counter blocks using Cadence Virtuoso in transistor level.

ESD protection Structure Jan '13 to May '13

Built an ESD protection structure for 10kV human body model (HBM) event with peak current of 6.5A, design goal being

minimization the area of the circuit.

Implemented RC triggered power clamp, O/P driver FETs and boost bus approach in 0.5um tech., Cadence Virtuoso to

achieve the goal.

Electric drive Systems Aug '12-Dec '12

Performed the simulations of DC Drive Speed Control, Four Quadrant DC Drives and The Hysteresis Current Regulated

Speed Control of Brushless DC Drives using MATLAB SIMULINK.

Dec '11 – Apr '12

Design of Low power Multiplier with RSTAT

Designed low power multiplier with RSTAT for DSP functions by filtering out spurious switching power signals to increase

the speed of operation and to reduce the power consumption of multiplier using Verilog for the wireless network applications.

Visakhapatnam Steel Plant May '11 - Jun '11

Gathered Information on the operation of air separation plant and exposed to the communication of PLC SCADA system in

the large steel plant.

8-bit picoProcessor Feb '11- May '11

Design of 8-bit picoProcessor by implementing ALU, memory blocks, instruction, execution registers using VHDL and

obtained the synthesis and timing reports using Xilinx ISE.

FFT Computation and generation of Spectrogram Aug '10 - Oct '10

Obtained the FFT of analog data signal and also acquired the spectrogram using image functions of MATLAB and also using

other algorithms.

HONORS AND ACTIVITIES

Distinction holder and college topper with an overall aggregate of 82.17% (GPA 4) in undergraduate program.

Received Gold Medal from Ekbote KM Association, India – Academic Achiever ‘12

Vignan Institute of technology India, Live Project Presentation - Second Place

Sri Vidyanikethan Engineering College India, Paper Presentation on “Non-Conventional Resources of energy”- Third

Place

Sri Kakatiya School of Excellence - Academic Excellence Award

CERTIFICATIONS

PLC Programming - Dr. Kelvin Erickson

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