KARIM TARAZI
***** ***** ****** **. **** . Rancho palos Verdes, CA 90275
CELL 562-***-**** . HOME 310-***-**** . E-MAIL *****.**@*****.***
OBJECTIVE
TO OBTAIN A FULLTIME POSITION AS A HANDS ON HARDWARE DESIGN ENGINEER AND
FIRMWARE DEVELOPER FOR EMBEDDED SYSTEMS.
SKILLS
HARDWARE/SOFTWARE DESIGNING/DEBUGGING: SOLDERING, OSCILLOSCOPE,
MICROSCOPES, LOGIC ANALYZERS, SIGNAL GENERATORS, IN-CIRCUIT
DEBUGGER/EMULATORS, USBEE-ZX, MULTI-METERS, SELF-WRITTEN LOGGERS AND
DECODERS, REVERSE ENGINEERING, PCB/CIRCUIT ANALYSIS, PCB ROUTING/COMPONENT
PLACEMENT, SCHEMATIC DESIGN AND ANALYSIS, MICROCHIP MPLAB IDE,
ACTIVE/PASSIVE COMPONENTS, PIC, ARM, 8051
Engineering Software: Cadence Design Package, MultiSim, Keil uVision-51,
MATLab, Oracle 9.1i, Xilinx Foundation Series 3.1i, Altium Designer
Programming Languages: C/C#/C++, Verilog, VHDL, Java, SQL, MySQL,
assembly.
Operating Systems: Windows 9x/NT/2000/XP/Vista/7, Linux/Unix
Experience
Independent Projects:
Developed the hardware and firmware for an automotive company which needed
an interface between an aftermarket fuel tank and the factory fuel gauge.
Designed, from concept to production, a conversion module for an
aftermarket traction control unit for automotive use including design,
schematics, PCB layout, PCB fabrication & assembly, parts sourcing,
resource management, and cost evaluation.
Nov '05 - Sept '12 Dice Electronics, LLC Lakewood, California
Hardware/Firmware Engineer: November 2005 - Sept '12
Implemented the entire USB control & audio& playback capability into the
Dice line of car integration kits.
Completed 2 BMW/Mini Cooper iPod/USB/Sat Radio Integration kits to market
over BMW protocol.
Completed Subaru iPod/USB/Sat Radio Integration kit to production.
Completed VW/Audi/Porsche/Lamborghini iPod/USB/Sat Radio Integration kit
to production over CANBbus and VW proprietary communication protocol.
Implemented a universal iPod/USB Integration kit over FM modulation with
RDS text display.
Implemented various sections of the BlueTooth protocol for the Dice line
of car integration kits.
Designed and implemented custom loggers for vehicle specific applications
(logging/debugging/decoding).
Identified, interpreted, wrote and distributed project specifications;
Designed schematics & PCBs, layout and routing; Cable definition and
design.
Project Manager: May '10 - Sept '12
Supervised four engineers. Distributed workloads equally and efficiently.
Mediated with company owners.
Proposed/applied problem solving approaches in order to meet deadlines and
complete projects.
Education
Spring '06 - Fall '07 California State University, Long Beach Long Beach,
California
Master of Science: Option in Computer Engineering
GPA: 3.636
Fall '99 - Fall '05 California State University, Long Beach Long Beach,
California
Bachelor of Science: Option in Computer Engineering
Double Minor: Computer Science and Applied Mathematics
President's List fort Fall 2000
GPA: 3.232
Summer '98 Stanford University Stanford, California
Introduction to university life & C/C++ Programming Course
Fall '95 - Spring '99 International School of Geneva Geneva, Switzerland
Bilingual International Baccalaureate (French/English) with an emphasis on
math and science
Projects
Graduate:
ASIC - Designed a 5-Stage pipelined RISC processor. Structural hazards,
Data hazards and Control hazards were all observed and resolved using
techniques such as stalling, forwarding, scheduling, flushing, resource
replication, resource pipelining, and various branch predictions. Fall
2006
C++ Programming simulation of the Traveling Salesman problem using
concurrent programming. The object of the simulation was load balancing,
bus contention, and efficient load distribution. Fall 2006
C++ Programming simulation of Raymond's Tree Based Algorithm in order to
show the possibility of mutual exclusion, proper handling and execution of
critical sections, and resource sharing in a distributed systems
environment. Fall 2006
C++ Programming of various games in order to use artificial intelligence
to challenge opponents as well as other AI systems. Fall 2006
Undergraduate:
ASIC - Designed a serial UART, an 8-bit MAC and Sine Wave Generator /
Resonator in VHDL and SoC. Developed full life cycle (coding, timing,
gate level simulation, custom chip layout. Spring 2005
Verilog - Designed a complete CPU capable of addition, subtraction,
multiplication and division of real numbers, complex numbers, vectors, and
other complex instructions. Complemented design with 624 pages of
thorough documentation including Rationale, ISA, Source Code, Design
Layout Diagram and Test Bench Outputs. (Top grade to date). Spring 2003
Designed Custom Integrated Circuits in .18( technology. Fall 2004
Hardware/Software designed projects using 8051 Microprocessor with
peripheral devices (A/D, D/A, LCDs, RAM/ROM, DC Motors, Infra-Red
Emitter/Sensor) programmed in assembly and C. Spring/Fall 2003
C++ Programming simulation of several casino black jack tables. Automated
simulation with random plays. Gathered statistics included, win/lose
ratios, amounts, averages winnings and time play per player, average table
play time, winnings/losses, overall casino winnings / losses. Fall 2002
Languages & CUlture
Excellent written and verbal proficiency in both English and French.
Extremely familiar with the European and Middle Eastern cultures.