Electrical Engineering

Boyu Sun

*****@*******.***

Local Address: Permanent Address:

*** ***** **** **** **.188 Fudong Road,

San Jose, CA 95134 Keyuan 6-3-5

216-***-**** Handan, Hebei, China 056008

Education:

College of Engineering Ithaca, NY

CORNELL UNIVERSITY

Master of Engineering, Electrical Engineering, May 2013

GPA: 3.300

Case School of Engineering Cleveland, OH

CASE WESTERN RESERVE UNIVERSITY

Bachelor of Science in Engineering, Electrical Engineering, August 2012

GPA: 3.373

-Dean’s High Honor List, Fall 2011

Relevant Coursework:

Analog Integrated Circuit Design; Advanced Analog VLSI Circuit Design; Advanced High-Speed/RF Integrated

Circuits Design; Digital VLSI Circuit Design

Research Experience:

09/2012- School of Electrical and Computer Engineering, Cornell University Ithaca, NY

07/2013 Design, Tape-out and Test of an Integrated RF Wild Life Tag, MEng Design Project

■ The RF Wild Life Tag was designed in Cadence Virtuoso with TSMC 180nm technology

■ Designed a Low Noise Amplifier with tunable gains of 35dB, 33dB and 30dB

■ Designed a Crystal Local Oscillator with tunable frequencies of 140-155MHz

■ Designed a Frequency Mixer to mix the received signal with the Local Oscillator

■ Designed a Frequency Divider to divide the frequency of the Local Oscillator to specific frequencies

to demodulate the received signal by using FSK Demodulator

04/2013- School of Electrical and Computer Engineering, Cornell University Ithaca, NY

05/2013 Design and Layout of a 33% Duty-Cycle Quadrature-Phase Frequency Divider, Class Project

■ Used two DFFs to generate the 25% duty-cycle quadrature phases and the one-half frequency

■ Used Transmission Gate and AND Gate to generate the specific delay and 33% duty-cycle

■ The output was fed back to a Charge-pump to control the T-Gate to lock the duty-cycle at 33%

04/2013- School of Electrical and Computer Engineering, Cornell University Ithaca, NY

05/2013 Design and Layout of a 8x8 1T-1C DRAM, Class Project

■ Designed the 1T-1C Cell, Bit-line, Sense Amplifier, Dummy Control Logic and 3:8 Decoder

■ Used folded Bit-line to reduce the cross-talk

■ Laid out the DRAM, Decoder and simulated the extracted layout in Cadence Assura

04/2013- School of Electrical and Computer Engineering, Cornell University Ithaca, NY

05/2013 Design and Layout of a Phase-Locked Loop, Class Project

■ Designed the VCO which was made up of three Inverters with linear tunable frequency of 7-10 kHz

■ Designed a Phase Detector and Feedback Loop with DFF, Charge-pump, and Low-pass Filter

■ Power<5nW, Jitter<1us, Locking Time<100ms

01/2012- Department of Electrical Engineering and Computer Science, CWRU Cleveland, OH

07/2012 Design of an RF Powered Telemetry Unit, Senior Project

■ Designed a 200MHz Class E RF Power Amplifier to power the Telemetry Unit located at 5cm away

■ Designed a 200MHz Transmitter for transmitting the PWM signal over 70cm

■ Designed a PWM Modulator and Demodulator

■ Routed the PCB of the circuitry with LPKF S63

Skills:

Cadence Virtuoso, PCB Artist, EAGLE, LPKF PCB Router, Oscilloscope, Function Generator, Spectrum Analyzer,

RLC Test Equipment, Multisim, LabView, Linux, Microsoft Office

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