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Engineer Design

Location:
Elon, NC
Posted:
October 08, 2013

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Resume:

Michael Wayland

*** ******* ** *****: 336-***-****

Elon, NC 27244 Email: mwayland2@ aol.com

SUMMARY

Lead Printed Circuit Board Design Engineer, experienced routing high

density interconnect rigid and flex PCB's. Expert with Zuken Layout Tools,

Mentor-Graphics Tool Suite including Expedition, Design Capture, Drawing

Editor, Board Station, Librarian, DA, High Speed Layout, Fablink and Ample.

Use excellent team work skills to resolve complex design problems between

electrical and mechanical design groups. Solid reputation, self motivated,

strong project and schedule commitment. Good written and oral communication

skills.

PROFESSIONAL EXPERIENCE

Research in Motion (2010-Present)

RTP, NC (Telecommunications, Hand Held Devices and Infrastructure)

Lead PCB Design Engineer

Design platform PCB's (big board and daughter boards) with advanced

chipsets for next generation hand held wireless devices. Designs include

complete base band, rf, wlan, power management chipsets creating a complete

wireless hand held design solution.

Incorporate next generation chipset layouts into existing form factor

handsets mechanics to verify design concepts and jump start software

development.

Sony Ericsson (2004-2010)

RTP, NC (Global Design, Manufacturer and Distributor of wireless

technology)

Lead PCB Design Engineer

Design rigid PCB's including smart mobile devices, using advanced layout

placement and routing strategies to successfully route .4mm and .5mm

chipsets minimizing PCB layers and maintaining maximum trace width and

spacing reducing cost. Designs include high speed memory routing

restrictions, USB, audio, dual microphone, discrete radio, wlan, 8 mega

pixel camera, fm radio and antenna routes/volumes. Design build volumes

exceeding 25 million.

Create complex dynamic and static flex designs adhering to strict design

cycle requirements. Typical layer stackups include FR4 and stainless

stiffeners, solder mask and coverlay areas, silver shield and gnd isolation

for critical nets.

Lead CAD, Technology and Assembly Group. Chartered to anticipate future

design requirements, software needs and cost effective design solutions.

Conduit for designers to communicate design/software problems, enhancements

and workarounds. Provided software feed back to Mentor Graphics identifying

weaknesses in rigid flex and embedded software design strategies. Co-

ordinate the migration from copper to solder mask defined footprints

increasing assembly yields for smaller pads requiring large RF and power

traces.

Designed three generations of quad band radio modules allowing main PCB

stackups to be optimized for base band routing. Modules enabled a generic

mobile phone PCB to be used for global distribution with the change of one

part number. Production volumes exceeding 100 million units.

Worked with global team for our design group, developing and enhancing

documentation and design storage system. (Space Champion)

Check designs using Valor for assembly and copper design violations.

Created supporting bare-board and assembly documentation for project builds

adhering to internal company standards. Outputs included assembly and

detail drawings, panels, gerber, drill, odb++, pick and place, stencil, net

list, gencad and mechanical board files.

Approve other designers data releases for builds insuring project

fabrications were successful.

Ericsson/Sony Ericsson by way of Aerotek (2000-2004)

RTP, NC (Global Design, Manufacturer and Distributor of wireless

technology)

Sr. Contract PCB Design Engineer

Designed platform evaluation mother boards, wing boards with mobile phone

board cores miscellaneous other keypad and display designs.

Created technology projects for advanced chipsets using internal and Jedec

outline standards for thermal, bend, footprint and routing evaluations.

Patent holder for Hearing Aide Compatible audio noise cancelation routing

strategy.

Wrote and distributed ample program to setup PCB design rules using company

classes and vendor price points as rules eliminating designer errors. Used

in conjunction with layout placement histogram designers can quickly select

stackup and company class rules required to route a given design.

General Dynamics/Lucent Technologies/AT&T/Western Electric (1983 - 2000)

Greensboro, NC (Advanced Technology Systems)

PCB Design Engineer-Sr. PCB Design Engineer

Designed complex surface mount multi-layer high speed digital and rf rigid

PCB's using Board Station High Speed Layout modeled stackup and net rules.

Documented designs in accordance with military specifications.

Built physical geometries and schematic logic library parts. Embedded

Project specific component shopping lists into Design Architect menu's

eliminating multiple part numbers for a given discrete value.

Created library processes, structure and supporting ample code for GDATS

Corporate Component Library (CCL) facilitating re-use and quality checks

between sites.

Checked customer's printed circuit designs being submitted for builds by

our factories for design and manufacturing errors, providing change

recommendations to facilitate higher yields and reliability.

Organized external customers printed circuit board assembly design builds,

creating pic and place programs using GC Place, modifying customer stencil

gerber data, sourcing components, creating factory floor documents and

scheduling Fugi surface mount line resource requirements.

EDUCATION/TRAINING

Associate in Applied Science, Mechanical Drafting & Design Technology

Alamance Community College, Graham, NC

Graduated with Honors

IPC Certified Designer Engineer

Bare-Board Fabrication Apprenticeship, AT&T Richmond Works, Richmond, VA

Printed Circuit Assembly Apprenticeship, Lucent Technologies Falcon Plant,

Whitsett, NC



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