Curriculum Vitae

Pawan Lanka

Mobile: +91-779*******

Email Address:

ab5unw@r.postjobfree.com

Career Objectives

To Grow Professionally by learning From the Organization and giving my

best.

Work Experience

Having 1.8 years of experience as a VLSI Engineer in academic projects

development at Erudite Electronics & IT Solutions Pvt Ltd., Hyd.

Education / Qualification

V Successfully completed B.Tech in Electronics and Communication

Engineering from the Jatipita College of Engineering affiliation to

JNTU Hyderabad, in the year 2007.

V Completed Intermediate in MPC from vidyarthi junior college, Adilabad

in the year 2003.

V Did 10th from visvodaya high school, nizamabad in the year 2001.

V Schooling from Kendriya Vidyalaya (KVS), Adilabad, A.P.

Personal Strengths

V Proficiency in English,

V Excellence working in team environment,

V Excellent communication skills,

V Strong problem solving skills.

Technical Skills

V Operating systems : Linux.

V Programming Languages : C, JAVA.

Project Profile

Title: 8051 CPU CORE OPTIMIZATION FOR LOW POWER AT

REGISTER TRANSFOR LEVEL.

Objective:

Several intellectual property (IP) cells are available in

the market to implement 8051-compliant CPUs, which are widely employed in

embedded systems for microcontroller applications. Yet they frequently lack

features that have become a key point in such systems, like power

optimization.

So in this project would like to focuses on minimizing the switching

activity of an 8051 IP core, through RTL (Register Transfer Level)

techniques such as state encoding, clock gating and operand isolation, with

the aim to keep unaltered CPU performances.

As results a total power reduction of about 40% has been achieved,

with limited area overhead.

Responsibilities:

V Writing RTL modules in VHDL and Testbenches.

V Architected the power optimization techniques.

V Power analysis of the RTL modules.

V Verified the RTL modules using HDL.

V Synthesized the design.

EDA Tools and Environment:

V Xilinx ISE.

V Xilinx Xpower Analyzer - power analysis.

Extracurricular Activities

. Participated Xilinx Technical Summit - 2011 held at Hyderabad

organized by Xilinx India on ESSENTIAL DESIGN WITH THE PLANAHEAD

ANALYSIS & DESIGN TOOL.

. Participated 10 days NCC Camp conducted by NCC 32 ANDHRA BATTALION at

Adilabad, A.P.

. Participated in workshop on COMPUTER HARDWARE AND NETWORKS conducted

by JETKING at Ameerpet, Hyderabad.

Achievements

. Successfully completed 63 mini projects in VLSI Domain, as project

Engineer at Erudite Electronics & IT Solutions Pvt Ltd.

. Achieved NCC A-Grade Certificate from 32 Andhra Battalion in the year

2005, Adilabad, A.P.

. Won 1st prize in 600 meters Athletics conducted in Jatipita College of

Engineering in the year 2004.

. Participated in various Sports activities in School.

Personal Profile

Name : Lanka Pawan

Fathers Name : L. Mohan

Date of Birth : January 18th 1986

Sex : Male

Marital Status : Unmarried

Nationality : Indian

Languages known : English, Telugu & Hindi

Permanent Address : H.No: 2-2-86, Khanapur Street

Adilabad Dist., A.P. 504001

Place: Hyderabad.

Date:

( L. PAWAN )[pic]

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