Engineer Process

DONALD O. ARUGU, Ph.D.

**** ****** ****

Austin, TX 78749

Mobile: 972-***-****

E-mail:

******.*****@***.***

SUMMARY

Resourceful, pragmatic Yield Enhancement Engineer with key experience in

semiconductor manufacturing, development, and applications. Author of

technical publications, inventor, and skilled Auger spectroscopist. Defects

reduction and process yield improvement champion. Transferable expertise

includes:

SEM/EDX Analysis Photolithography Interconnect

Technology

Process Integration Yield Enhancement Optical Wafer

Inspection

PROFESSIONAL EXPERIENCE

Micron Technology, Manassas, VA

RDA Module Engineer 2011-

2012

. Employed real time defects analysis (rda) to drive yield improvement

activities for manufacturing memory chips at the contact module.

Performed defect to yield loss correlation using probe bin fails to

develop reaction mechanisms for OOC processes.

. Evaluated and qualified CMP slurries from alternative U.S. suppliers

following near supply disruption from Japan post 2011 earthquake.

TEXAS INSTRUMENTS, INC. Dallas, TX

Process/Yield Engineer 2004 -

2009

Led successful teams to resolve defect problems and improve yield

. Identified and resolved furnace vibration induced clustered defects at

Poly Silicon deposition resulting in 2% yield improvement.

. Resolved multiple Carbon and Stainless steel defect sources at Digital

Mirror (DLP) Assembly and Test production facility resulting in 5% yield

improvement.

. Identified and resolved Aluminum (AlOS) particulate defect issues at T4

test by implementing cleaning and handling procedures for linear carriers

in DLP Window loop.

MOTOROLA INC. Austin, TX

Yield Engineer 2000 - 2003

. Reduced metal pattern defects by 70% by implementing a post Aluminum

deposition scrub process resulting in 10% yield improvement.

. Achieved 50% reduction in FEOL trench cone defects by implementing a pre-

Argon etch process

. Implemented a scrub chemistry that eliminated post CMP defect residues at

local interconnect and contact levels on aluminum and copper

technologies.

. Co-invented a void free metal fill process for contacts and vias of any

aspect ratio.

DONALD O. ARUGU, Ph.D.

KLA-TENCOR INSTRUMENTS CORP., Austin TX

Sr. Applications Engineer

1996 - 2000

. Trained customers to proficiency on methods of defect detection using KLA-

Tencor Defect Inspection platforms (KLA21XX, KLA255X)

. Developed and supported customer acceptance tests procedures for tool

matching, beta testing, and head-to-head product evaluation.

. Implemented advanced recipe management (SAT, Mean/Range, ADC) and

strategies for managing wafer inspection capacity/costs at 3 customer

sites. Work generated a repeat order for $2M wafer inspection equipment.

. Provided feedback on competitive business opportunities to accounts sales

manager.

SEMATECH INC. Austin, TX

Process Integration Engineer

1992 - 1996

. Led process integration team that developed 0.25 um CMOS process enabling

the certification of all process development tools at this technology

node.

. Developed and supported custom process flows for member companies'

silicon needs to exercise process development equipment at 0.25um, and

0.35um design rules.

. Eliminated causes of particulate defects in Rainbow etcher by

implementing a preventive maintenance procedure that periodically

replaced quad seals on the load locks. Received the Etch Division

Recognition Award for Excellence for this effort.

. Evaluated the performance of organic anti-reflective coatings on silicon,

nitride, and SiO2 substrates, for effectiveness and compatibility with

chemically amplified DUV photoresists. Work resulted in the adoption of

Apex-E as a positive DUV photoresist.

ADDITIONAL RELEVANT EXPERIENCE

Material Science Research Center of Excellence, Washington DC

Resident Auger Spectrocopist

. Performed surface analysis and characterization of semiconductor films

(SiC, GaAs, AlGaAs, InGaAs, SiN, and TiN) using Auger Spectroscopy, to

support research efforts to develop novel high temperature semiconductor

materials, and fast switching low band gap devices.

. Invented a process for etching geometric frames of 5-micron thick SiC

films on silicon substrate. This invention enabled the discovery of the

unique property of birefringence in SiC crystals.

. Developed a composite metal contact for SiC with lowest recorded specific

resistance, enabling advances in the building of SiC devices.

EDUCATION

. Ph.D. Electrical Engineering, Howard University, Washington DC

. MSChE, BSChE, Chemical Engineering, Howard University, Washington DC

INVENTIONS / PUBLICATIONS

. Method of forming an arc layer for a semiconductor device (US Patent

006908852B2)

. Metal fill process for Semiconductor Device (Patent pending, filed

September 2002)

. TI-64324 "Linear carrier storage and transport rack" - Patent disclosure

submitted 3/30/07

. Effects of anneal temperature on the electrical characteristics of nickel

based ohmic contacts to beta-SiC, Electron. Lett 31 (8), 678-680 (1995)

. 0.35 - micron excimer DUV photolithography process, SPIE Vol. 127

Optical/Laser Microlithography VI, 287, 1993.

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