Engineer Project

SABNAM KOLEY

**, ************ ****

Garia, Kolkata,West Bengal-700084

+91-915*******, +91-801*******

******.*****@*****.***

**********@**********.***

Objectives

To be a part of a professionally managed & technically sound chip design team in a developed state-of-

the art organization and to advance career by updating personal & professional skills progressively by

sincere application & devotion to work.

Hands on Experience

Tanner EDA Tools

Synopsys

Xillinx

C Compiler of PIC

Electric

Education

M.Tech(2013) in VLSI from Heritage Institute of Technology under WBUT with an

aggregate of 8.63.

B.Tech(2010) in ECE from Dumkal Institute Of Engineering & Technology under WBUT

with an aggregate of 8.23.

Higher Secondary(2006) in Science from Chinsurah Balika Banimandir under WBCHSE

with an aggregate of 71.20%.

Secondary(2004) in General from Sultanpur Tulsidas Vidyamandir under WBBSE with an

aggregate of 80%.

Final Year Project

M.Tech

Study Of Matching Layout Techniques For Analog VLSI Design .

Main target of the project is to match the paired devices for the standardization of the analog

layout techniques, to minimize the area of the Layout and try to make the Routing easier for

the Improvement of Parameters(Gain, Bandwidth, Noise, Linearity,Voltage

Swing,Speed,etc.) and the future aspect is to minimize the parasitic noise for the better

improved layout techniques with balanced performance.

- Under the guidance of Assistant Professor Posiba Mostafa, B.E.(W.B.U.T.), M.E (J.U.),

Microelectronics and VLSI design, Department of Electronics and Communication Engg.,

Heritage Institute of Technology, Kolkata.

B.Tech

Single Transistor FM Transmitter.

My project gave me an overview of small transmission system. With the help of the

transmission kit we easily transmit FM signals up to 40 meters. Any FM receiver(radio) can

receive the signals very clearly.

Industrial Training

Done a project on 4 Bit ALU Design using Xillinx from ARDENT Institute (Duration - 1

Month).

Well Known Papers

Physical Design of VLSI

Semiconductor Devices

Microelectronics

Publication

“VLSI Standard Cell Layout” at Heritage of VLSI Design & Technology; Volume 1, March 2012, Page

No. 66-75, published by ECE Dept., Heritage Institute of Technology, edited by – Associate Professor

Krishanu Datta, B.E.(J.U.), M.Tech (IIT KGP, Gold Medalist), Ex Engineer (intel USA), Lead:

Microelectronics and VLSI design, Department of Electronics and Communication Engg., Heritage

Institute of Technology, Kolkata.

Scholarship & Award

Got scholarship and appointed as TA under TEQIP (II), from August 2012 to June 2013, at Heritage

Institute of Technology.

Personal Profile

Name: Sabnam Koley

Father’s Name:Kashinath Koley

Mother’s Name:Deepmala Koley

Date of birth: 15th April, 1989

Nationality: INDIAN

Sex: Female

Languages Known: English,Bengali,Hindi

Reference

Prof. Krishanu Datta

Associate Professor

B.E.(J.U.), M.Tech (IIT KGP, Gold Medalist), Ex Engineer (intel OR, USA, TI India)

Lead/Coordinator: Microelectronics and VLSI design

Department of Electronics and Communication Engg.

Heritage Institute of Technology

Documents Available on Request

I certify that the information furnished above is factually correct and subject to verification by

concerned authority.

Place:

Date:

Sabnam Koley

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