Engineer Power

ROBERT JAW

**** *. ***** ****

Glendale, AZ *****

*********@*****.***

623-***-****(H). 602-***-****(C).

Position Goal : Position that can apply my extensive experience in

analog circuit,

Switching power supply design, test

development and application.

Award & Honor: Received NASA award for outstanding achievement in

developing

Phoenix Mars mission that landed in Mars.

Won first place in hardware design for

International Space Station at

Honeywell

Publications: "Hardware Design Technique" Mainly dealing with EMI

layout problems

Motorola application notes

"ADC Sampling for Motorola DSP56F80x" Motorola

application notes.

Computer Language, Tool and Key experiences:

Assembly language, DSP( butterfly calculation),

C, C++, Lab View, Mentor Graphics, Power Logic and PAD, Cadence

Allegro SPB15.2, OrCAD, PSPICE, Allegro AMS SPB15.5 PSPICE,

SWCADIII, DXP 2004 and Asset JTAG Scan works, DxDesign.

Technical Competence:

Switching Power Supply, Servo

control and Stability analysis.. The EMI minimization by filtering- input

K factor to achieve optimum control EMI resonance damping and its

system performance, Current Mode frequency in relation to bandwidth of

control & sub-harmonic oscillation p/s's feedback loop.

in Buck topology. Sync Buck Shield grounding (at both ends or

converter. Inverter and tri-level single end?), Good wiring and

PWM. Transient response analysis. grounding techniques.

Zinc-air battery LDO for battery or hand held design.

IGBT Design. Varying Rg-on and -off High voltage and high current IGBT.

resistor to control switching speed High energy protons in Van Allen

to eliminate turn on and turn off belts, single event effects. RED

voltage and current spikes and HARDEN parts selection

anti-parallel diode behavior. Phase Locked Loop- stayed locked &

Using two-level short circuit become locked

protection to prevent IGBT from Accelerometers and Gyros.

destroying, when IGBT reaching

de-saturation voltage. Bootstrap

circuit

Professional Experience:

ACSS, L-3 Phoenix, AZ

8/2012 -June/2013

Contract Engineer

Design, implement and fine tune a power supply system for a new product-

NXT transponder for working with TCAS in airplane. Inputs for power system

are 28V DC and 115 VAC, 400 Hz. A step down transformer is used to stepped

down 115V ac to lower voltage then output of that is Rectified and filtered

to low DC then step up to high DC. Use DCM fly back to generate various low

voltages. Measuring leakage inductance and Ipeak at turn off to design RCD

clamp circuit, reducing drain peak voltage from 255V to 180V, reducing

ringing frequency by more than half, greatly cut down EMI. Use Buck

inductor to generate 50V for transceiver. Out of box clever design not only

cuts down one thousand uF hold up capacitor, saving plenty of board

space but also extend the required hold up time from 200mS to 530mS for

book keeping and other various tasks after received power failing warning

when power is removed from LRU.

Measure plant transformer functions. With all power supplies being current

controlled mode, type 2 error amplifier is enough to boost phase. Thus

overall loop transfer functions on all different power supplies have plenty

of phase margin and gain margin.

Honeywell International Tempe and Glendale, AZ

10/2011 - July 2012

Contract Engineer (Lead Engineer)

Wrote failure analysis and Trouble shot a rocket controller using 600V,

225A IGBT and MOSFET driver to control a BLDC 3 phase motor for pith and

yaw movement. Calculated a new set values for Rg-On, Rg-Off, bootstrap

resistor and add a new resistor to limit zener current that used in clamp

gate voltage to 16V

Worked on Orion VMC (Vehicle Management Computer ) of the Orion vehicle.

. Modified the cable for RS 485 which failed tests often, modified the

Spacewire, both cables are built without consideration of twisted

pair and neglected the plus and minus wire symmetry. They either did

not have twisted within the pair or had twisted among pairs. OR got

extra unnecessary wire in the pair.

. Found a design error on R.Supv FPGA board

. Found an error in FPGA Register related error

. Write supervisor router FPGA function tests using TIDE script.

Telco Test Solutions Phoenix, AZ

8/2010 - 11/2010

Contract Engineer (Lead Engineer)

Responsible for all circuit issues on 1200V 400A IGBT Drive

. Designed and implemented a two level short protection circuit for the

1200V 400A Power supply The circuit is based upon the fact that Vce of

IGBT will rise when the IGBT has exceeded the normal current operating

level and short circuit will kick in and protect IGBT from

destroying...

. Designed an isolation of H-bridge for power driver which will come to

play when the drive is using to measure threshold voltage for high

voltage MOSFET

. Selected a 2nd source IGBT that fits the drive of company project.

Home Project

5/2-2009 - 10/2009

Designed an inverter for solar panel for my house, first step up low DC

to high DC with voltage double plus some fraction, to 170V then use low

level 3-level PWM( for less harmonic and less switching loss) to switch

high voltage MOSFETS in H-Bridge Configuration then filter the end signal

to get the pure 120V 60 Hz AC.

Honeywell International Glendale,

AZ 2/2007 - 2/20/09

Contract Principal Engineer (Lead Engineer)

Responsible for circuit issues with International Space Station

. Designed a spin motor electronics for company volume reduced next

generation gyroscope using company's digital gate array. The motor is

6 poles 3 phase BLDC. Derived motor transfer function with the

attached flywheel. Derived the torque-speed curve, calculated the

maximum terminal voltage needed for the motor, figured out power

consumption with trapezoidal velocity profile. Performed stability

analysis, thermal effect and acceleration effect for both power

consumption and motor demagnetization to make sure that required

acceleration current does not exceeds the motor pulse rating. It will

be a four-quadrant controller so that it maintains control as the

motor speed passes through zero.

. Won 1st place in design contest among 6 HW proposals for designing an

On Orbit Tester. Implemented the design and the proto type works

perfectly. The tester (closed box testing, the tester is attached to

a station permanently. All you do is to stick the box into station)

will test 5 I/O cards, 1553 bus, power supply cards and various other

cards to single out the failed channels and circuits so that to re-

configure system to get ready for the shortage of cards due to end

life of Space Shuttle in 2010.. The design has to use minimum parts

due to load limitation in getting to Space. This work helps to re-new

contract with NASA.

. Investigated a returned MDM power supply card that showed 5V output

current dropped in Space. A quick cold can spread (-39C) test on PWM

showed that the On time decreased from 4uS to 1uS and 5 V dropped to

3.6V. Further testing of 10 PWMs on a breadboard under cold

temperature is conducted. Test results show that the On time of 10

PWMs did reduce to certain degree (one third to one half), but none of

them to such a degree that output voltage is affected. Further check

on error amplifier compensation network and other part of circuit did

not reveal any clue.

. Analyzed and solved unknown state of the cables for a video recorder

in International Space Station. The cables have mismatched line

impedance. Due to complex connections, cost and delivery schedules.

Company wanted the best solution. Analyzed by its physical length and

baud rate, I calculated the reflections and risk factor. And decided

to leave the cables the way it is. The risks are slim to none. Saved

company money and schedules

. Designed Ethernet ESD protection circuit against 8kV ESD on EPIC.

Designed a 1553 bus and interface with multiple RT. Trouble-shot power

supply monitor circuit and replaced a part which can stand instant

voltage 25W in power supply card

Rockwell-Collins, Cedar Rapids, IA

7/2006 - 12/2006 Contract Engineer

Designed and trouble-shot a nuclear explosion detector board, that after

detecting radiation, sends a signal out, and the board will processing the

signal to get ready to protect all the boards that are plugged in the

backplane by turning off the power supply, PMOSFET switches and ground

all the outputs of the power supply by firing SCR. The board is

successfully designed and tested..

Some circuits designed on board

. A fly_back DC-DC converters 28V to 5V with control chip LM2587-5 and

isolation transformer as main power source.

. A control circuit with variable adjustable gain and timing schedule

turns on and off the main PMOSFET switches that control all the power

entering to the whole power system.

. An automatic selection circuit that will pick 5V derived from primary

28V if it is available and the other 5V derived from 2nd 28V, if

primary is gone. It has Break-before-make non-overlapping circuit

that prevents both switches being turned on simultaneously.

. Timing circuits that processes nuclear warning signal to prepare the

board to engage firing SCR

General Dynamics

Scottsdale, AZ 1/2006 - 7/2006

Contract Engineer

Responsible for JTRS (software defined radio) Integration and Test

. Found the root course of P/S output oscillation. The ground under PWM

control chip was not separated switching pin from feedback and

reference pins. Low input range is less than the requirement of CM

buck topology and that caused sub_harmonic oscillation due to inner

current loop gain peaking.

. Trouble shot a boost power supply converter that could not even start.

It turned that there is an exposed pad underneath the chip that serves

as thermal conduction and end point for the internal ground, the pad

should be grounded and soldered to PCB but it wasn't.

. Trouble shot a DC-DC power supply converter that did not work right.

My analysis and simulation found that the converter can only source

2.5 A @ 3.6V with sync frequency @ 2MHz. Sourcing more than that,

output voltage will drop under 3.6V.

. Designed a versatile test fixture from scratch. It accommodates up to

eight different sizes and shapes of circuit boards such as RF, GPS,

Digital Core radio, High Power Amplifier, etc. which constitute

different radio sets.

. Designed a breakout board that breaks 0.05 mm connectors to 2mm

connectors so that it makes it easy for different wires like I2C,

I2S, differential pairs, USB and Ethernet go to different panels while

in developing stage. Calculated maximum length of cables to avoid

reflection and ring due to quick rise time.

. Helped digital designer come up scan chain that will test JTAG

compatible device like CPLD, FPGA and non-boundary-scan clusters for

missing devices, damaged devices, misaligned devices, wrong devices

and open and short circuits to keep the integrity of circuit boards

Northrop Grumman

Tempe, AZ 4/2005 - 12/2005

Contract Engineer

Responsible for updating IR camera testing and modifying power supply test

software

. Designed a system that will detect an early breakdown of compressor

used in cooled infrared detectors (-200 C degree) on U2 airplane,

using DSP principle and sound analysis ( Third Octave analysis and

Narrow Band analysis)

. Took control of an automated test recording console with 10

programmable Laureate DPMs that was not finished due to technical

difficulty. Overcame the occasionally " No response " of meters by re-

configured the meter from half duplex to full duplex of RS 485

communication. Also solved the disagreement of DPM and hand held

meter. The trouble was that someone wired a local sense to28V power

supply. Once hook up a load, the local sense shorting out the remote

sense and it failed to account the voltage drop along the wires. all

this and some wrong jumper settings and incorrect configuration

messed up the progress before I took over

. Designed and built a pre-amplifier for Sound Card that needs input

10mV minimum to record and the microphone output only 2.2 mV.

. In charge of modifying and update power supply test software. One of

the major accomplishing is changing the hard coding of some test

equipment offsets that was measured years ago and embedded in software

without updating. My work replaces hard coding with a file that can be

constant updated without going through revision change.

LPL, University of Arizona

Tucson, AZ 11/2003- 3/2005

Contract Engineer

Responsible for parts of a scientific instrument in Mars Phoenix Lander

. Designed a Power supply board (4 DC-DC converters to generate +/- 12V,

+5V digital + 15 and +3V with EMI filter for a scientific instrument

(TEGA) for Mars 2007 Phoenix Lander (which was launched this 5th

August 2007). Using Mentor Graphics tool: for schematic drawing,

Layout and footprint creation. Hand routed some of signal to reduce

EMI noise. Use newest wet tantalum capacitor LCR81 to save board

space.

. Designed a Preamp board, an analog board with a RTD system with a fine

current source and a PID controller for Phoenix Mae slander.

. Solved EMI interference from a 430 MHz transmitter on Gamma Ray

Spectrometer.

.

Motorola Inc.

Tempe, AZ. 6/1999-10/2003

Staff Application Engineer

Responsible for reviewing new chip design, trouble shooting DSP and

microprocessor based hardware and system design. Help customers in

designing with Motorola chips.

. Corrected DSP chip flaw in original design that had delay issues in

clock propagation and possible intermittent loss of clock. By removing

the clock, a fault situation as in over voltage and over current

applications, the PWM would be disengaged immediately to prevent delay

and avoid possible hazardous situations.

. Solved on-chip PLL failing to lock problem by finding root cause of

long rise time in the power supply. Quick resolution of this issue

resulted in customer satisfaction and account win.

Medtronic Inc. Tempe, AZ. 2/1995 -4/1999

Test/Product Engineer

Designing hardware and test software for MIP group products.

. Received cash award for reducing test time for a BiCMOS hearing aid

from five minutes/die to 30 seconds/die, increased test speed by over

tenfold with DSP technology.

. Designed step up high voltage power supply with 320VDC output with

115 v ac input.

. Designed test program for 64 gray scales TFT LCD driver.

Education:

City University of New York. New York, New York. BS, Electrical

Engineering, 1985.

Arizona State University, Tempe, AZ. Non-degree seeking Graduate Student,

Others: U.S. Citizen. Held Secret clearance. Eta Kappa Nu academic

honorary.

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