| Resume alert | Resumes 71 - 80 of 808 |
Electronics and Communication Engineer, C progamming, Verilog coding
Marathahalli, Karnataka, India
**** **** **** * ****** SATISH KUMAR N #*** *** ***** ****, ************ Marathahalli Bangalore-560037 701-***-**** adiaf2@r.postjobfree.com CAREER OBJECTIVE To obtain a position that will enable me to use my strong organizational skills... - 2020 Dec 02
**** **** **** * ****** SATISH KUMAR N #*** *** ***** ****, ************ Marathahalli Bangalore-560037 701-***-**** adiaf2@r.postjobfree.com CAREER OBJECTIVE To obtain a position that will enable me to use my strong organizational skills... - 2020 Dec 02
Engineering Contact Details
Vasant Nagar, Karnataka, India
... Technical Skills Programming Language: C, Verilog HDL Tools and Libraires : Network Simulator, Modelsim EDA Tools : Cadance Orcad,Tanner EDA, Kicad Operating System: Windows Personal Traits Take everything in a positive way. Be a reliable team ... - 2020 Dec 02
... Technical Skills Programming Language: C, Verilog HDL Tools and Libraires : Network Simulator, Modelsim EDA Tools : Cadance Orcad,Tanner EDA, Kicad Operating System: Windows Personal Traits Take everything in a positive way. Be a reliable team ... - 2020 Dec 02
Design Engineering
Hosur, Tamil Nadu, India
... MODELSIM : • Verification using System Verilog. 4. XILINX : • FPGA Design and Implementation. 5. ELECTRIC TOOL : • Using of LTspice . • Analysing of both Analog Design and Digital Design. SYNOPSYS VCS : • Performing lint-checks. • Inserting ... - 2020 Nov 25
... MODELSIM : • Verification using System Verilog. 4. XILINX : • FPGA Design and Implementation. 5. ELECTRIC TOOL : • Using of LTspice . • Analysing of both Analog Design and Digital Design. SYNOPSYS VCS : • Performing lint-checks. • Inserting ... - 2020 Nov 25
Engineer Engineering
Vasant Nagar, Karnataka, India
... : Linux, Windows Programming Language: basics of C HDL: Verilog Microsoft word Microsoft PowerPoint WORK EXPERIENCE: [VLSI GURU]: [DFT Engineer - Trainee] Ongoing Project: [TEST-1] Description: Pattern generation & DRC analysis at block level. ... - 2020 Nov 22
... : Linux, Windows Programming Language: basics of C HDL: Verilog Microsoft word Microsoft PowerPoint WORK EXPERIENCE: [VLSI GURU]: [DFT Engineer - Trainee] Ongoing Project: [TEST-1] Description: Pattern generation & DRC analysis at block level. ... - 2020 Nov 22
Engineer Python
Whitefield, Karnataka, India
... Areas of Interest Embedded programming Internet Of Things Technical Skills Programming Language - C, Embedded C, Python, OOPS Hardware Description Language - Verilog Software tools - Keil IDE, Code blocks, Xilinx ISE, Spyder IDE, Microwind Operating ... - 2020 Nov 22
... Areas of Interest Embedded programming Internet Of Things Technical Skills Programming Language - C, Embedded C, Python, OOPS Hardware Description Language - Verilog Software tools - Keil IDE, Code blocks, Xilinx ISE, Spyder IDE, Microwind Operating ... - 2020 Nov 22
Engineering Digital
Bangalore, Karnataka, India
... Self Confidence Interactive Willingness to learn Adaptable to any kind of environment Area of interest Digital Design Through Verilog Digital System Design Digital Electronics Switching Theory and Logical Design Personal Details Date of birth: 27th ... - 2020 Oct 29
... Self Confidence Interactive Willingness to learn Adaptable to any kind of environment Area of interest Digital Design Through Verilog Digital System Design Digital Electronics Switching Theory and Logical Design Personal Details Date of birth: 27th ... - 2020 Oct 29
Mental Health Engineering
Jayanagar, Karnataka, India
... SKILL SET Hardware Description Languages : VHDL, Verilog System Architectures : μC 8051, MSP 430 Assembly Programming : μC 8051( Kiel μVision 3&4), Xilinx ISE 6.1. Programming Languages : C, C++, MATLAB, Python Basics. Operation System : Basics of ... - 2020 Oct 18
... SKILL SET Hardware Description Languages : VHDL, Verilog System Architectures : μC 8051, MSP 430 Assembly Programming : μC 8051( Kiel μVision 3&4), Xilinx ISE 6.1. Programming Languages : C, C++, MATLAB, Python Basics. Operation System : Basics of ... - 2020 Oct 18
Engineer Design
Bangalore, Karnataka, India
... 2.Intern in CRL Team, “Design and implementation of OFDM based WiFi PHY Layer” Bharat Electronics Ltd., Bangalore, India Duration: 10 months Assigned responsibilities of assisting in writing verilog codes for modules in creating, running, debugging ... - 2020 Oct 15
... 2.Intern in CRL Team, “Design and implementation of OFDM based WiFi PHY Layer” Bharat Electronics Ltd., Bangalore, India Duration: 10 months Assigned responsibilities of assisting in writing verilog codes for modules in creating, running, debugging ... - 2020 Oct 15
Design Python
Bangalore, Karnataka, India
... TECHNICAL SKILLS Hardware Description Language and Programming Language: Verilog, C++, Python (Basics) and R (Basics) Backend Concepts: Physical Design, Logic Synthesis, Clock Tree synthesis, Floor plan, Timing Constraints, VLSI tech files. Other ... - 2020 Oct 06
... TECHNICAL SKILLS Hardware Description Language and Programming Language: Verilog, C++, Python (Basics) and R (Basics) Backend Concepts: Physical Design, Logic Synthesis, Clock Tree synthesis, Floor plan, Timing Constraints, VLSI tech files. Other ... - 2020 Oct 06
Design Office
Vasant Nagar, Karnataka, India
... 85 KSEEB 2014 94.40% TECHNICAL SKILLS: Proficient programming languages such as C,Verilog HDL Software Packages : MS office Operating Systems : windows PROJECT: Design and analysis of low power approximate multiplier for multimedia applications. ... - 2020 Oct 05
... 85 KSEEB 2014 94.40% TECHNICAL SKILLS: Proficient programming languages such as C,Verilog HDL Software Packages : MS office Operating Systems : windows PROJECT: Design and analysis of low power approximate multiplier for multimedia applications. ... - 2020 Oct 05