| Distance: | Job alert | Jobs 41 - 50 of 4528 |
Digital Design Engineer
CHAOS Industries
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Hawthorne, CA, 90250
... RTL design, behavioral simulation, place and route, timing analysis, hardware integration Extensive experience developing in Verilog and SystemVerilog Extensive experience with the ARM AMBA AXI Protocol (AXI4, AXI4-Lite, AXI4-Stream) Extensive ... - Apr 20
Senior Software Engineer, Hardware Tools and Methodology Development
NVIDIA Corporation
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Santa Clara, CA, 95053
... cross functional teams Improve algorithms (in C++) for automated connectivity, auto logic insertion and post processing Verilog RTL Improve quality of existing tools and flows used by the teamWhat we need to see: BS or MS (preferred) degree or ... - May 06
Processor ASIC RTL Design Engineer
Qualcomm
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San Diego, CA, 92140
... Qualifications: 2+ years of practical experience with details of RTL development including: functional and structural RTL design in system Verilog, design partitioning, simulation and regression, collaboration with design verification team. ... - Apr 30
Graphics Design Verification Engineer
Apple Inc.
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Austin, TX, 78719
... Architect test bench methodology using Universal Verification Methodology (UVM) and System Verilog components. Build testing stimulus, coverage, and regression strategy. Own and maintain test benches and BFMs. Debug simulation and silicon GPU ... - Apr 29
IC Design Engineer IV
SRI International
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Princeton, NJ, 08544
... capacitor, Phased locked loop (PLL) and/or Pulse width modulation (PWM) controller design experience * Knowledge of HDL (Verilog or VHDL) design & synthesis * Scripting languages such as Perl, Python or TCL The salary range is: $117,684-$155,934. ... - May 12
Graphics (GPU) Architectural Modeling Engineer
Apple Inc.
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Austin, TX, 78719
... Experience with HDLs, Verilog, System Verilog or VHDL. Experience with turning architectural specifications into executable models. Minimum of BS + 3 years of relevant experience. Experience in C++ programming. Experience with C++ modeling of ... - Apr 16
Principal Hardware Design Engineer
Psiquantum
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Palo Alto, CA
... Software tools: Orcad Schematic Capture and Allegro PCB Layout C++, Python, RTL (VHDL or Verilog) Keysight PathWave ADS Microsoft Office Experience/Qualifications: 7 years of experience with a Master Degree. 9-12 years of experience with a B.S. ... - May 07
Front-End Power Engineer
ETCHED LLC
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Cupertino, CA, 95014
... You may be a good fit if you have Experience in RTL development using Verilog/SystemVerilog, with a focus on low-power RTL design and optimization for complex digital systems. In-depth knowledge and experience in implementing low-power techniques ... - May 08
GPU Top RTL Designer
Apple Inc.
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Austin, TX, 78719
... of the following areas: logic optimization, synthesis, timing analysis, floor-planning, power intent descriptions, and clock domain clock crossings Experience writing RTL in Verilog and/or System Verilog Experience with logic simulation and debug - Apr 16
GPU Formal Design Verification Engineer
Apple Inc.
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Austin, TX, 78719
... Experience with HDLs such as Verilog/System Verilog and temporal logic assertion-based languages such as SVA. Exposure to formal verification and analysis of pipelined micro-architectures, MMUs, and cache coherency control mechanisms. Experience ... - Apr 25